System Performance Enhancements

This section describes system performance enhancements in this release.

smt_pause API

The smt_pause() function can be used by applications on CMT systems that do a busy-wait or idle loop. The function enables other hardware strands sharing the same core to run faster during the busy wait.

For more information, see the smt_pause(3C) man page.

libmtmalloc Improvements

libmtmalloc has undergone a performance improvement that specially targets 64-bit applications with a large number of threads. libmtmalloc now has the following enhancements:

• The default configuration has eliminated many locks in favor of atomic operations, which cannot be interrupted. They guarantee a consistent state.

• Linked list searches are replaced with matrix lookups.

• Options have been added to eliminate additional locks (MTEXCLUSIVE) and make the threshold of an oversize allocation a tunable parameter (MTMAXCACHE). For more information, see the mtmalloc(3MALLOC) man page.

• A new switch, MTREALFREE, uses madvise to return memory to the operating system.

The enhancements result in reduced lock contention and increased performance, especially for applications with a large number of allocating threads. However, single-threaded applications that use libmtmalloc in its default configuration show a 20 percent degradation in performance.

libc is recommended for single-threaded applications. libumem gives superior performance for low thread-count applications. For thread counts that are greater than or equal to 16, libmtmalloc provides superior performance.

For more information, see the libmtmalloc(3LIB), and mallocctl(3MALLOC) man pages.

Tunable Parameter for Flash Devices in the sd.conf Configuration File

For flash devices in the emulation mode, a new tunable parameter, emulation-rmw, has been added to the sd.conf configuration file. This tunable parameter enables you to turn read-modify-write (RMW) to on or off in the configuration file. For solid-state drives (SSD) that have a bad RMW algorithm, you can assign RMW emulation to the sd driver rather than using the firmware.

By configuring this tunable parameter, the performance of raw disk I/O improves significantly as compared to performing RMW inside the SSD firmware.

x86: Oracle Solaris I/O Interrupt Framework Enhancement for Nehalem-EX Platforms

The Oracle Solaris I/O interrupt framework is enhanced for Nehalem-EX platforms to provide a large number of MSI/MSI-X interrupt vectors that scale with the number of processors configured in the system. These enhancements provide the following advantages:

• Support for configuration of a large number of devices in the system

• Support for device drivers to use a large number of the available MSI/MSI-X interrupts to achieve better performance of the device operations

Although these enhancements are largely transparent, better I/O performance might be achieved depending on the platform and devices used in the system. In addition, the pcitool(1M) command has been updated with revised syntax and options.

x86: Intel AVX Support

Oracle Solaris supports the Intel AVX (Advanced Vector Extensions) instruction set. Intel AVX is a 256-bit instruction set extension to SSE (Streaming SIMD Extensions). The instruction set is designed for applications that are floating-point intensive. Intel AVX helps to improve performance of tasks such as audio/video processing, simulations, financial analysis, and 3D modeling. Intel AVX is a part of the Intel SandyBridge processor family.

For more information about Intel AVX, see http://software.intel.com/en-us/avx/.

Shared Memory Enhancements

Changes in creating, locking, unlocking, and destroying Intimate Shared Memory (ISM) and Dynamic Intimate Shared Memory (DISM) have resulted in significant performance improvement in the startup and shutdown of the Oracle database.

For more information, see the mlock(3C), shmop(2), and shmctl(2) man pages.