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Writing Device Drivers
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Part I Designing Device Drivers for the Solaris Platform

1.  Overview of Solaris Device Drivers

2.  Solaris Kernel and Device Tree

3.  Multithreading

4.  Properties

5.  Managing Events and Queueing Tasks

6.  Driver Autoconfiguration

7.  Device Access: Programmed I/O

8.  Interrupt Handlers

9.  Direct Memory Access (DMA)

10.  Mapping Device and Kernel Memory

11.  Device Context Management

12.  Power Management

13.  Hardening Solaris Drivers

14.  Layered Driver Interface (LDI)

Part II Designing Specific Kinds of Device Drivers

15.  Drivers for Character Devices

16.  Drivers for Block Devices

17.  SCSI Target Drivers

18.  SCSI Host Bus Adapter Drivers

19.  Drivers for Network Devices

20.  USB Drivers

Part III Building a Device Driver

21.  Compiling, Loading, Packaging, and Testing Drivers

22.  Debugging, Testing, and Tuning Device Drivers

23.  Recommended Coding Practices

Part IV Appendixes

A.  Hardware Overview

SPARC Processor Issues

SPARC Data Alignment

Member Alignment in SPARC Structures

SPARC Byte Ordering

SPARC Register Windows

SPARC Multiply and Divide Instructions

x86 Processor Issues

x86 Byte Ordering

x86 Architecture Manuals


Store Buffers

System Memory Model

Total Store Ordering (TSO)

Partial Store Ordering (PSO)

Bus Architectures

Device Identification

Supported Interrupt Types

Bus Specifics

PCI Local Bus

PCI Address Domain

PCI Configuration Address Space

PCI Configuration Base Address Registers

PCI Memory Address Space

PCI I/O Address Space

PCI Hardware Configuration Files

PCI Express


SBus Physical Address Space

Physical SBus Addresses

SBus Hardware Configuration Files

Device Issues

Timing-Critical Sections


Internal Sequencing Logic

Interrupt Issues

PROM on SPARC Machines

Open Boot PROM 3

Forth Commands

Walking the PROMs Device Tree

Mapping the Device

Reading and Writing

B.  Summary of Solaris DDI/DKI Services

C.  Making a Device Driver 64-Bit Ready

D.  Console Frame Buffer Drivers


Device Issues

This section describes issues with special devices.

Timing-Critical Sections

While most driver operations can be performed without mechanisms for synchronization and protection beyond those provided by the locking primitives, some devices require that a sequence of events occur in order without interruption. In conjunction with the locking primitives, the function ddi_enter_critical(9F) asks the system to guarantee, to the best of its ability, that the current thread will neither be preempted nor interrupted. This guarantee stays in effect until a closing call to ddi_exit_critical(9F) is made. See the ddi_enter_critical(9F) man page for details.


Many chips specify that they can be accessed only at specified intervals. For example, the Zilog Z8530 SCC has a “write recovery time” of 1.6 microseconds. This specification means that a delay must be enforced with drv_usecwait(9F) when writing characters with an 8530. In some instances, the specifications do not make explicit what delays are needed, so the delays must be determined empirically.

Be careful not to compound delays for parts of devices that might exist in large numbers, for example, thousands of SCSI disk drives.

Internal Sequencing Logic

Devices with internal sequencing logic map multiple internal registers to the same external address. The various kinds of internal sequencing logic include the following types:

Interrupt Issues

Note the following common interrupt-related issues: