This system performance enhancement is new in the Developer 9/07 release.
The context mechanism, which is used by the Memory Management Unit (MMU) hardware to distinguish between the use of the same virtual address in different process address spaces, introduces some inefficiencies when shared memory is used. The inefficiencies are because the data at a particular shared memory the address in different processes may really be identical, but the context number associated with each process is different. Therefore, the MMU hardware will not be able to recognize a match. This results in mappings being unnecessarily evicted from the MMU translation cache, Translation Lookaside Buffer (TLB), to be replaced by identical mappings with a different context number.
The UltraSPARC T2 (Niagara 2) system has an additional “shared” context, which is a hardware feature which can be used to prevent the inefficiency in handling shared memory. When the TLB is searched for mapping a match on either the private or the shared context results in a TLB hit. The current software support for shared context activates the feature for processes which use Dynamic Intimate Shared Memory (DISM). In this case the process text segment and DISM segments mapped at the same virtual address and with the same permissions for each process will use the shared context.