Alternate Pathing (AP) is a software-driven facility that employs both redundant hardware and redundant software driver paths between a server and a disk array or a network. If one path fails, AP ensures that the disk array or network is still available through the alternate path. For example, the alternate path can be a second port on an interface board, or an entirely separate interface board. See also Device Reconfiguration.
Baseboard Management Controller: The BMC is used to manage chassis environmental, configuration and service functions, and receive event data from other parts of the system. It receives data through sensor interfaces and interprets these data by using the Sensor Data Repository (SDR) to which it provides an interface. The BMC provides another interface to the System Event Log (SEL). The BMC allows Both the SDR and the SEL to be accessed from the system or from the Intelligent Platform Management Bus (IPMB). A typical function of the BMC is to measure processor temperature, power supply values, and cooling fan status. It can take some autonomous actions to preserve system integrity. For example, it might switch on a fan at a particular temperature threshold. An application interface may be provided to enable custom user-management applications to be built.
The BMC describes an abstract function, or role. It carries no definition of how it might be implemented.
(1) A point at which information about the status of a job and the system can be recorded so that the job can later be restarted from that point. (2) A sequence of instructions in a computer program for recording the status of execution for restarting. v. to checkpoint; n. checkpointing.
An adaptation of the PCI bus architecture defined in the Peripheral Component Interconnect (PCI) Specification 2.1 (or later) to an electrically-compatible robust industrial form. This form specifies a Eurocard-style printed circuit board assembly (PCBA) that uses "hard metric" connectors to connect it to the enclosure backplane. CompactPCI is an open specification supported by the PCI Industrial Computers Manufacturers' Group (PICMG).
The PCI bridge between the System Host processor and the CompactPCI bus. The CompactPCI bridge must reside in the system slot to provide CompactPCI clocking and arbitration that are only available from that slot. CompactPCI bridges maybe controllable by the System Management Controller to turn off clocks and arbitration.
A process that is used in the Netra CP2140 board system to configure (add) or deconfigure (remove) device tree allocations and load or unload software driver modules while the system is running. It is analogous to Dynamic Reconfiguration that is used on some Sun high-end server systems with some important differences. It is not used to reconfigure memory or CPU resources and it can be used automatically in the Full Hot-Swap and HA Hot-Swap cases when the Hot-Swap framework software is prompted by the System Management Controller (when HA is available). Netra CP2140 board HA device reconfiguration can also be invoked manually from a console.
The OpenBoot PROM probing process constructs a hierarchical representation of the hardware devices that are found on the bus, the host-bus being the root. The device tree includes several device nodes. (Ethernet is a device node.)
A code or data module which can be called by the OpenBoot PROM during system startup. It is placed in unused memory space between OpenBoot PROM and POST. User-created dropins are usually used to initialize custom user hardware. They do not require that the user possesses OpenBoot PROM source code; only the binary OpenBoot PROM image need be licensed. Dropins are used to add firmware drivers for user hardware.
Dynamic Reconfiguration (DR) is a software package that enables the administrator to (1) view a system configuration; (2) suspend or restart operations involving a port, storage device, or board; and (3) reconfigure the system (detach or attach hot-swappable devices such as disk drives or interface boards) without the need to power down the system. When DR is used with Alternate Pathing or Solstice DiskSuite software (and redundant hardware), the server can continue to communicate with disk drives and networks without interruption while a service provider replaces an existing device or installs a new device. DR supports replacement of a CPU/Memory, provided the memory on the board is not interleaved with memory on other boards in the system. Note that DR is used with Sun high-end server systems. See Device Configuration for the analogous process that is applied to the Netra CP2140 board.
The process of transfer of function from a failed component subsystem to an alternate one while preserving the operational state of the overall system. The functions transferred may include those of control and management.
An ordered set of instructions and data that is stored in a way that is functionally independent of main storage, for example, microprograms stored in a read-only memory (ROM). The term firmware describes microcode in ROM. At the time they are coded, microinstructions are software. When they are put into ROM, they become part of the hardware (microcode) or a combination of hardware and software (microprograms). Usually, microcode is permanent and cannot be modified by the user but there are exceptions.
High-availability: the property of a system associated with a high in-service to out-of service time ratio. This property can be engineered by reconfiguring the system "on the fly" to isolate failed elements so they can be replaced without affecting the operational condition.
Host Computer (context-dependent): (1) A computer that usually performs network control functions and provides end-users with services such as computation and database access.
(2) The primary or controlling computer in a multi-computer installation.
Hot-swap: The capability or property of a system element to be removed or replaced while the system hardware is nominally operating under power. This capability is usually invoked after a failure and is implemented by a sequence that steers the functions of the element to other parts of the system.
Hot-swap, as defined by PICMG, can be classified as Basic, Full, or HA.
Inter-Integrated Circuit Bus: a serial bus developed by Philips for inter-package communications and typically used by them in TV sets. In Sun Compact PCI systems, it is used to link card elements in a system for management communications.
Intelligent Platform Management Interface: IPMI is a protocol interface with a protocol stack that includes link, transport and session layers to provide reliability. It resides on an I2C physical layer.
Non-Volatile Random-Access Memory Run Command. This refers to the executable OpenBoot PROM script that is written in the NVRAM. Other text information or binary data may exist in the NVRAM, but is not referred as NVRAMRC.
This refers to a firmware program that consists of executable code by the CPU. This code initializes the hardware, performs Power On Self-Test (POST) and boots the system to bring up the Solaris Operating Environment. The OpenBoot PROM, or system PROM, contains code to run POST and a suite of user-accessible subsystem hardware tests. It has a Forth interpreter for custom user routines. Under a normal boot sequence, it provides a path to a system boot device which is accessed after POST completes. "Open Firmware" is controlled by IEEE Standard 1275.
The functional entity that includes a host--with a host PCI bridge--and the peripherals that it controls on the CompactPCI bus. The partition management is performed by the CompactPCI bus bridge on a compliant board. A partition is analogous to a PCI domain with the difference that partition integrity is not guaranteed for boards that do not contain 21554 bridges.
The functional entity that includes a host--usually with a host PCI bridge--and the peripherals that it controls. The domain does not necessarily uniquely include the PCI bus because this bus can be shared by multiple domains. For example, a second domain can comprise a second host/bridge element that controls a different set of peripherals on a shared bus. Separation and management of the domains is implemented by a controlling system mechanism that guarantees their mutual protection.
Power-on Self Test: a suite of tests run out of system firmware before any other code is loaded. The purpose of such testing is to check the integrity of the hardware before loading a software system.
Sensor Data Repository: the database that the BMC uses to determine what sensors, FRU devices, and management controllers are in the system. This database contains an account of sensor locations, properties, and associations.
The extent to which a backplane and cards combination can be extended by accounting for signal loading. In Compact PCI, a segment spans a maximum of eight card slots, beyond which some bridge elements (system bridge) are needed to provide expansion into another segment.
System Event Log: the database of measured values and events that is created by the BMC based upon its sensor monitoring. This database resides in the host and is accessible by high-level applications.
System Management Controller: There is a System Management Controller on each card in the enclosure. One of these cards either assumes control by command or takes control after negotiation with the other System Management Controllers. The System Management Controller manages peripherals to improve the availability of the system. Through the IPMB, this entity receives information on IDs of, or problems with, cards in the system and can communicate that information with other cards or with a system host via another bus. The SC can switch the PCI bridge, PCI arbitration, and PCI clocking on or off.
A system host accepts interrupts and owns peripherals. It executes user applications and decides the distribution of tasks and within a system. In hot-swap systems the system host acts as a traffic router and functions to activate and deactivate peripheral cards (plug-in boards). It is not a Compact PCI requirement that the system host reside in a system slot although this is normally the case. If it resides in a peripheral slot that slot must be wired to receive peripheral interrupts from the backplane.
Provides clocks and arbitration. This device must be controllable from somewhere. It can be controlled from a controller. The system host need not reside on the same card but the card that performs the function of system host must be able to talk to the slot containing the system-slot bridge.