(1) A number used by system software to identify a data storage location.
(2) In networking, a unique code that identifies a node to the network.
Application-specific integrated circuit.
Advanced Technology Attachment. See also SATA.
A bank can be:
(1) Interleaving within a single device on a DDR1 SDRAM.
(2) A pair of adjacent DIMMs.
Ball grid array.
The process of reading initial software into the computer.
A set of conductors that connect various functional units within a computer.
A smaller, faster accessible set of memory used to speed up operations of CPUs, storage, and networking components. Typically found within the component it serves.
Common Desktop Environment.
Compact disc read-only memory. A CD-ROM drive reads data recorded on the CD-ROM optical disc.
Rewritable compact disc.
(1) Coder/decoder. A CODEC uses analog-to-digital conversion and digital-to-analog conversion in the same chip.
(2) Compression/decompression. An algorithm or computer program for reducing byte consumption in large files and programs.
Display data channel version 2. DDC2 is the I2C interface used to communicate with the monitor. This interface is the same for both the HD15 and DVI-I connectors.
Double data rate synchronous dynamic random access memory.
A preset value that is assumed to be correct unless changed by the user.
Dual inline memory module. A printed circuit card that contains dynamic random access memory chips. See Registered DIMM.
Direct memory access. The transfer of data directly into memory without supervision of the processor. The data is passed on the bus directly between the memory and another device.
Dynamic random-access memory. A read/write dynamic memory in which the data can be read or written in approximately the same amount of time for any memory location.
Mounting hardware used to secure hard drives and other peripherals inside the workstation.
Data translation look-aside buffer.
Optical drive that can read and write DVDs and CDs.
Digital versatile disc read-only memory.
Error checking and correction. The detection and correction of all single-bit errors, plus the detection of double-bit and some multiple-bit errors.
Extended capabilities port.
Electrically erasable programmable read only memory.
Electromagnetic interference. An electrical characteristic that directly or indirectly contributes to a degradation in performance of an electronic system.
Texas Instruments Inc. 0.13 micron chip fabrication process.
A type of network hardware that provides communication between systems connected directly together by transceiver taps, transceiver cables, and various cable types such as coaxial, twisted-pair, and fiber-optic.
Flash programmable read-only memory.
Floating-point unit. A device (board or integrated circuit) that performs floating-point calculations.
(Gb) Gigabit. 1024 megabits. Commonly used term in Ethernet: Gigabit Ethernet.
(GB) Gigabyte. A gigabyte is 1024 megabytes. Usually refers to data transfer speeds or the capacity of a storage device.
Gigahertz. One billion cycles per second.
Graphical user interface.
Inter-integrated circuit. A chip-to-chip serial bus.
Interrupt concentrator chip.
Institute of Electrical and Electronics Engineers, Inc. The organization establishes standards for some computers and electrical components.
A high-speed communications protocol.
Instruction translation look-aside buffer.
The input/output bridge chip that uses the Jbus architecture.
The system bus developed for the UltraSPARC IIIi series of processors.
(KB) Kilobyte. 1024 bytes of data.
Level 2 cache.
Local area network.
Any node (location in a tree structure) that is farthest from the primary node.
Media access controller. See also PHY.
(Mb) Megabit. 1,048,576 bits.
(MB) Megabyte. One million bytes.
Megabits per second.
Memory controller unit.
Megahertz. One million cycles per second.
Media independent interface.
Multiplex, multiplexer. A multiplexer merges information from multiple signals to a single channel.
An addressable point on a network.
Nonvolatile random access memory. Stores system variables used by the boot PROM. Contains the system host ID number and Ethernet address. NVRAM retains the data when the workstation is powered off.
OpenBoot PROM contains the PROM monitor program, a command interpreter used for booting, resetting, low-level configuration, and simple test procedures. OpenBoot software initially boots the system to a state in which the system can further load an operating system.
OpenGL is an application programming interface (API) for developing portable, interactive 2D and 3D graphics applications.
Peripheral component interconnect. A high-performance 32- or 64-bit-wide bus with multiplexed address and data lines.
Peripheral Component Interconnect Express. A scalable I/O serial bus technology with greater bandwidth than PCI and PCI-X.
An improvement to the PCI bus.
Removable media assembly. A device such as a smart card reader, CD-ROM drive, DVD-ROM drive, 4-mm tape drive, or a diskette drive.
Physical access layer. Part of the digital-to-analog connection between the MAC and the physical Ethernet wire.
Power-on self-test. A series of tests that verify motherboard components are operating properly. Now initiated with the post command.
Programmable read-only memory. After the PROM has been programmed, it cannot be reprogrammed. See flash PROM.
A DIMM that includes a register buffer.
Reduced instruction set computer. A computer using the RISC architecture.
Serial attached SCSI.
Small computer system interface.
Single data rate.
Serial electrically erasable programmable read only memory.
System management bus. The SMBus protocol is a subset of the I2C protocol.
A card used for user authentication or storing individual user preferences.
A search for the latest data in memory.
A highly integrated system I/O chip. One of three I/O subsystem bridge chips.
System power-on reset.
Standard parallel port.
Static random access memory.
A diagnostic application for testing hardware.
A processor that can execute more than one instruction per cycle.
A privileged account with unrestricted access to all files and commands.
A connection that enables a remote shell window to be used as a terminal to display test data from a system using the terminal interface protocol (Tip).
Time of day. A timekeeping integrated circuit.
Ultra direct memory access. A DMA mode within an IDE controller.
The high-performance central processing unit used in the Sun workstations. The CPU uses SPARC V9, 64-bit reduced instruction set computer (RISC) architecture.
Universal Serial Bus. USB 1.1 can transfer data up to 12 Mbps. USB 2.0 can transfer data up to 480 Mbps.
Voltage at the common collector (positive [+] electrical connection).