The shift and rotate instructions operate on packed bytes, words, doublewords, or quadwords in 64–bit operands.
Table 3–25 Shift and Rotate Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
pslld |
PSLLD |
shift packed doublewords left logical | |
psllq |
PSLLQ |
shift packed quadword left logical | |
psllw |
PSLLW |
shift packed words left logical | |
psrad |
PSRAD |
shift packed doublewords right arithmetic | |
psraw |
PSRAW |
shift packed words right arithmetic | |
psrld |
PSRLD |
shift packed doublewords right logical | |
psrlq |
PSRLQ |
shift packed quadword right logical | |
psrlw |
PSRLW |
shift packed words right logical |