ddi_dma_attr Structure

The DMA attribute structure has the following members:

uint_t			dma_attr_version;
 uint64_t			dma_attr_addr_lo;
 uint64_t			dma_attr_addr_hi;
 uint64_t			dma_attr_count_max;
 uint64_t			dma_attr_align;
 uint_t			   dma_attr_burstsizes;
 uint32_t			dma_attr_minxfer;
 uint64_t			dma_attr_maxxfer;
 uint64_t			dma_attr_seg;
 int			      dma_attr_sgllen;
 uint32_t			dma_attr_granular;
 uint_t			   dma_attr_flags; 

dma_attr_version is the version number of the attribute structure.

dma_attr_addr_lo is the lowest bus address that the DMA engine can access.

dma_attr_addr_hi is the highest bus address that the DMA engine can access.

dma_attr_count_max specifies the maximum transfer count that the DMA engine can handle in one cookie. The limit is expressed as the maximum count minus one. It is used as a bit mask, so it must also be one less than a power of two.

dma_attr_align specifies additional alignment requirements for any allocated DMA resources. This field can be used to force more restrictive alignment than implicitly specified by other DMA attributes such as alignment on a page boundary.

dam_attr_burstsizes specifies the burst sizes that the device supports. A burst size is the amount of data the device can transfer before relinquishing the bus. This member is a binary encoding of burst sizes, assumed to be powers of two. For example, if the device is capable of doing 1-, 2-, 4-, and 16-byte bursts, this field should be set to 0x17. The system also uses this field to determine alignment restrictions.

dma_attr_minxfer is the minimum effective transfer size the device can perform. It also influences alignment and padding restrictions.

dma_attr_maxxfer describes the maximum number of bytes that the DMA engine can transmit or receive in one I/O command. This limitation is only significant if it is less than (dma_attr_count_max + 1) * dma_attr_seg. If the DMA engine has no particular limitation, this field should be set to 0xFFFFFFFF.

dma_attr_seg is the upper bound of the DMA engine's address register. This is often used where the upper 8 bits of an address register are a latch containing a segment number, and the lower 24 bits are used to address a segment. In this case, dma_attr_seg would be set to 0xFFFFFF, and prevents the system from crossing a 24-bit segment boundary when allocating resources for the object.

dma_attr_sgllen specifies the maximum number of entries in the scatter-gather list. It is the number of segments or cookies that the DMA engine can consume in one I/O request to the device. If the DMA engine has no scatter-gather list, this field should be set to one.

dma_attr_granular field describes the granularity of the device's DMA transfer ability, in units of bytes. This value is used to specify, for example, the sector size of a mass storage device. DMA requests will be broken into multiples of this value. If there is no scatter-gather capability, then the size of each DMA transfer will be a multiple of this value. If there is scatter-gather capability, then a single segment will not be smaller than the minimum transfer value, but may be less than the granularity; however the total transfer length of the scatter-gather list will be a multiple of the granularity value.

dma_attr_flags is reserved for future use. It must be set to 0.