The PCI configuration space consists of up to six 32-bit base address registers for each device. These registers provide both size and data type information. System firmware assigns base addresses in the PCI address domain to these registers.
The firmware identifies the size of each addressable region by writing all 1's to the base address register and then reading back the value. The device will return 0's in all don't-care address bits, effectively specifying the size of the address space.
Each addressable region can be either memory or I/O space. The value contained in bit 0 of the base address register identifies the type. A value of 0 in bit 0 indicates a memory space and value of 1 indicates an I/O space. Figure 2-4 shows two base address registers: one for memory; the other for I/O types.