Exchange Register / Memory With Register (xchg)

xchg{bwl}		reg[8|16|32], r/m[8|16|32]

Operation

DEST -> temp

SRC -> DEST

temp -> SRC

Description

Two operands, in either order, are exchanged by xchg. During the exchange, BUS LOCK is asserted (regardless of the value of IOPL or the LOCK prefix) if a memory operand is part of the exchange.

Example

xchgb %cl, 1(%esi)  /*exchange byte register with EA byte */
 xchgl %ebp, %eax
 xchgl %ebx, %eax
 xchgl %ecx, %eax
 xchgl %edi, %eax
 xchgl %edx, %eax
 xchgl %edx, 4(%edi)  /*exchange word register with EA word */
 xchgl %esi, %eax
 xchgl %esp, %eax