## Double Precision Shift Right (shrd)

shrd{wl} imm8, reg[16|32], r/m[16|32]
shrd{wl} %cl, reg[16|32], r/m[16|32]

##### Operation

by imm8 shift-right r/m[16|32] bits reg[16|32] -> r/m[16|32]

by reg[16|32] shift-right r/m[16|32] bits r/m[16|32] -> r/m[16|32]

##### Description

`shrd` double-precision right shifts a 16- or 32-bit register value into a word or long for the count specified by an immediate value MODULO 32 (0 to 31). The result is stored in that particular word or long.

The second variation of `shrd` double-precision right shifts a 16- or 32-bit register or memory value into a word or long for the count specified by register CL MODULO 32 (0 to 31).The result is stored in that particular word or long.

`shrd` sets the SF, ZF, and PF flags according to the value of the result; CS is set to the value of the last bit shifted out; OF and AF are undefined.

##### Example

Use the count specified by the constant, 253, to double-precision right shift a 16-bit register value from the DX register to the effective address (addressed by the EDI register plus an offset of 4):

shrdw $253, %dx, 4(%edi)

Use the count specified (%CL MOD 32) by the 32-bit EDX register to double-precision right shift a 32-bit memory value at the effective address (addressed by the EDI register plus an offset of 4)

shrdl %cl,%edx, 4(%edi)