NAME | SYNOPSIS | FEATURES | DESCRIPTION | RESCTRICTIONS | ATTRIBUTES | SEE ALSO
drv_f/src/quicc/8260/quicc8260.h - mpc8260 specific constants drv_f/src/quicc/8260/quicc8260.c - driver code drv_f/src/quicc/8260/quicc8260Prop.h - driver specific properties
DRV
The quicc8260 bus driver implements:
the common bus driver interface
the quicc bus driver interface
The driver works on Motorola mpc8260 micro-controllers and provides an abstraction of the CPM peripheral bus and local and PowerPC busses.
The driver uses the PowerPC specific dki interface provided by the kernel. Thus, the driver works only with the PowerPC family of products.
The quicc8260 driver does not provide the drv_probe() routine. In other words, the quicc8260 driver does not enumerate the bus, nor does it detect a quicc8260 device or create an associated device node. When the quicc8260 driver is used, associated device nodes should be created either statically by a boot program or dynamically by a separate bus enumerator driver. Such an enumerator driver could be developed for this particular bus architecture.
The quicc8260 driver provides the drv_bind() routine. This routine examines the device node property PROP_NODE in order to recognize a quicc8260 compatible device. This routine checks whether the device node name matches a pre-defined device name. If the check is positive, the drv_bind() routine binds the driver to the device node attaching a PROP_DRIVER property to the device node. The property value specifies the quicc8260 driver name. The parent bus driver uses such a property to determine the name of the driver servicing the device. In other words, via the PROP_DRIVER property, the driver gives its name to the parent bus driver asking it to invoke the drv_init() routine on that device. Note that the drv_bind() routine is not active if a PROP_DRIVER property is already present in the device node. In other words, the drv_bind()routine does not override existing driver-to-device binding.
The driver does not provide the drv_unload() entry. Thus, the driver component cannot be unloaded, even if it has been dynamically loaded at run time.
The driver supports the DKI_SYS_SHUTDOWN event specified by the common DKI interface.
The table below summarizes characteristics of the quicc8260 bus driver.
driver name: | "sun:powerpc-mpc8260-(bus, quicc)" |
hardware: | Motorola MPC8260 micro-controllers |
exported interface: | "quicc" (QUICC_CLASS) |
exported interface version: | 0 (QUICC_VERSION_INITIAL) |
imported parent interface: | "powerpc" (FDKI_CLASS) |
minimal parent interface version: | 0 (FDKI_VERSION_INITIAL) |
device probing (auto-detection): | not supported |
driver to device binding: | supported (on node name basis) |
driver unloading: | not supported |
system (emergency) shut-down: | supported |
normal device shut-down: | not supported |
hot-plug (surprise) device removal: | not supported |
The Table below lists device node properties used by the quicc8260 driver. Note that the column "m/o" specifies whether a given property is mandatory or optional. For optional properties, the column "default value" shows a default value which is used by the driver when a given property is not specified.
Name | Alias | Type | m/o | Default Value |
---|---|---|---|---|
"imap-rgn" | QUICC_PROP_IMAP_RGN | QuiccPropMemRgn | m | |
"dpram-rgn" | QUICC_PROP_DPRAM_RGN | QuiccPropMemRgn | m | |
"clock-freq" | QUICC_PROP_CLOCK_FREQ | QuickPropClockFreq | m | |
"brg-clock-freq" | QUICC_PROP_BRG_CLOCK_FREQ | QuiccPropClockFreq | m | |
"cpm"-clock-freq" | QUICC_PROP_CPMCLK | QuiccPropClockFreq | m | |
"mem-rgn | QUICC_PROP_MEM_RGN | QuiccPropMemRgn | o | see text |
"pin-config" | QUICC_8260_PROP_PIN_CONFIG | Quicc8260PropPinConfig | m | |
"intr-config" | QUICC_8260_PROP_INTR_CONFIG | Quicc8260PropIntrConfig | o | see text |
The QUICC_PROP_IMAP_RGN property specifies the internal memory region mapping.
The QUICC_PROP_DPRAM_RGN property specifies the Dual Ported RAM memory region mapping.
The QUICC_PROP_CLOCK_FREQ property specifies the local bus clock frequency.
The QUICC_PROP_CPM_CLOCK_FREQ property specifies the CPM processor clock frequency.
The QUICC_PROP_BRG_CLOCK_FREQ property specifies the BRGs input clock frequency.
The QUICC_PROP_MEM_RGN property specifies the regions in the internal memory map where allocation of DMA regions is allowed. This property is an array that declares the ranges of memory, in the internal memory map, which are free for DMA usage (dma_alloc()/dma_free()). By default, the entire DPRAM region of the internal memory map is usable for DMA allocation purposes.
The QUICC_8260_PROP_PIN_CONFIG property specifies the configuration and routing of the parallel I/O ports' pins and internal controllers' clocks. This property provides the values to be set in internal map registers which manage the configuration and routing of parallel I/O port pins. For each port (A, B, C, D), the following registers must be provided:
pin assignment register
pin special option register
data direction register
open drain register
data register value.
In addition, the following clock configuration registers must be provided:
CMX FCC clock route register is used to configure FCC controllers in multiplexed or non-multiplexed mode (NMSI), and to select FCC clocks.
CMX SCC clock route register is used to configure SCC controllers in multiplexed or non-multiplexed mode (NMSI), and to select SCC clocks.
CMX SMC clock route register is used to configure SMC controllers in multiplexed or non-multiplexed mode (NMSI), and to select SMC clocks
The QUICC_8260_PROP_INTR_CONFIG property specifies the interrupts configuration. This property defines :
SIU interrupts modes configuration (sicr property field)
SIU interrupts priorities (siprr property field)
CPM FCCs and MCCs relative priorities (scprr_h property field)
CPM SCCs relative priorities (scprr_1 property field)
The sicr property field should be set using the following macro:
SIU_INTR_CONFIG(siu_prio_mode, scc_prio_mode, highest)
siu_prio_mode indicates the PIT, TMCNT and IRQ1-5 priority mode to be used:
SIU_PRIO_GROUPED: interrupts are grouped by priority
SIU_PRIO_SPREAD: interrupts are spread by priority among other sources
scc_prio_mode indicates the SCC priority mode to use in:
SCC_PRIO_GROUPED: SCC interrupts are grouped by priority in higher priorities
SCC_PRIO_SPREAD: SCC interrupts are spread by priority among other sources
highest indicates a value of type QuiccPropIntr which should be assigned to the highest priority.
The siprr property field should be set using the following macro:
SIU_INTR_PRIORITY(p1, p2, p3, p4, p5, p6, p7, p8)where px is a value of type QuiccPropIntr in [QUICC8260_TMCNT_INTR, QUICC8260_IRQ5_INTR] to be assigned to SIU priority position <XSIUx> (p1=highest, p8=lowest)
The scprr_h property field should be set using the following macro:
CPM_FAST_INTR_PRIORITY (p1, p2, p3, p4, p5, p6, p7, p8)where px is a value of type QuiccPropIntr in [QUICC8260_FCCI_INTR, QUICC8260_MCC2_INTR], or --1, to be assigned to SIU priority position <XCCx> (p1=highest, p8=lowest).
The scprr_1 property field should be set using the following macro:
CPM_SCC_INTR_PRIORITY(p1, p2, p3, p4, p5, p6, p7, p8)where px is a value of type QuiccPropIntr in {QUICC8260_SCC1_INTR, QUICC8260_SCC4_INTR], or --1, to be assigned to SIU priority position <YCCx> (p1=highest, p8=lowest).
By default, interrupts are configured as follows:
SIU_INTR_CONFIG(SIU_PRIO_SPREAD, SCC_PRIO_SPREAD, QUICC8260_TMCNT_INTR) SIU_INTR_PRIORITY(QUICC8260_TMCNT_INTR, QUICC8260_PIT_INTR, QUICC8260_IRQ1_INTR, QUICC8260_IRQ2_INTR, QUICC8260_IRQ3_INTR, QUICC8260_IRQ4_INTR, QUICC8260_IRQ5_INTR, QUICC8260_IRQ6_INTR) CPM_FAST_INTR_PRIORITY(QUICC8260_FCC1_INTR, QUICC8260_FCC2_INTR, QUICC8260_FCC3_INTR, QUICC8260_MCC1_INTR, QUICC8260_MCC2_INTR, -1, -1, -1) CPM_SCC_INTR_PRIORITY(QUICC8260_SCC1_INTR, QUICC8260_SCC2_INTR, QUICC8260_SCC3_INTR, QUICC8260_SCC4_INTR, -1, -1, -1, -1)
The current version of the quicc8260 driver does not support dynamic assigment of quicc bus resources.
See attributes(5) for descriptions of the following attributes:
ATTRIBUTE TYPE | ATTRIBUTE VALUE |
---|---|
Interface Stability | Evolving |
NAME | SYNOPSIS | FEATURES | DESCRIPTION | RESCTRICTIONS | ATTRIBUTES | SEE ALSO