x86 Assembly Language Reference Manual

MMX Instructions

The MMX instructions enable x86 processors to perform single-instruction, multiple-data(SIMD) operations on packed byte, word, doubleword, or quadword integer operands contained in memory, in MMX registers, or in general-purpose registers.

Data Transfer Instructions (MMX)

The data transfer instructions move doubleword and quadword operands between MMX registers and between MMX registers and memory.

Table 3–20 Data Transfer Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

movd

MOVD

move doubleword 

movdq valid only under -xarch=amd64

movq

MOVQ

move quadword 

valid only under -xarch=amd64

Conversion Instructions (MMX)

The conversion instructions pack and unpack bytes, words, and doublewords.

Table 3–21 Conversion Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

packssdw

PACKSSDW

pack doublewords into words with signed saturation 

 

packsswb

PACKSSWB

pack words into bytes with signed saturation 

 

packuswb

PACKUSWB

pack words into bytes with unsigned saturation 

 

punpckhbw

PUNPCKHBW

unpack high-order bytes 

 

punpckhdq

PUNPCKHDQ

unpack high-order doublewords 

 

punpckhwd

PUNPCKHWD

unpack high-order words 

 

punpcklbw

PUNPCKLBW

unpack low-order bytes 

 

punpckldq

PUNPCKLDQ

unpack low-order doublewords 

 

punpcklwd

PUNPCKLWD

unpack low-order words 

 

Packed Arithmetic Instructions (MMX)

The packed arithmetic instructions perform packed integer arithmetic on packed byte, word, and doubleword integers.

Table 3–22 Packed Arithmetic Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

paddb

PADDB

add packed byte integers 

 

paddd

PADDD

add packed doubleword integers 

 

paddsb

PADDSB

add packed signed byte integers with signed saturation 

 

paddsw

PADDSW

add packed signed word integers with signed saturation 

 

paddusb

PADDUSB

add packed unsigned byte integers with unsigned saturation 

 

paddusw

PADDUSW

add packed unsigned word integers with unsigned saturation 

 

paddw

PADDW

add packed word integers 

 

pmaddwd

PMADDWD

multiply and add packed word integers 

 

pmulhw

PMULHW

multiply packed signed word integers and store high result 

 

pmullw

PMULLW

multiply packed signed word integers and store low result 

 

psubb

PSUBB

subtract packed byte integers 

 

psubd

PSUBD

subtract packed doubleword integers 

 

psubsb

PSUBSB

subtract packed signed byte integers with signed saturation 

 

psubsw

PSUBSW

subtract packed signed word integers with signed saturation 

 

psubusb

PSUBUSB

subtract packed unsigned byte integers with unsigned saturation 

 

psubusw

PSUBUSW

subtract packed unsigned word integers with unsigned saturation 

 

psubw

PSUBW

subtract packed word integers 

 

Comparison Instructions (MMX)

The compare instructions compare packed bytes, words, or doublewords.

Table 3–23 Comparison Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

pcmpeqb

PCMPEQB

compare packed bytes for equal 

 

pcmpeqd

PCMPEQD

compare packed doublewords for equal 

 

pcmpeqw

PCMPEQW

compare packed words for equal 

 

pcmpgtb

PCMPGTB

compare packed signed byte integers for greater than 

 

pcmpgtd

PCMPGTD

compare packed signed doubleword integers for greater than 

 

pcmpgtw

PCMPGTW

compare packed signed word integers for greater than 

 

Logical Instructions (MMX)

The logical instructions perform logical operations on quadword operands.

Table 3–24 Logical Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

pand

PAND

bitwise logical AND 

 

pandn

PANDN

bitwise logical AND NOT 

 

por

POR

bitwise logical OR 

 

pxor

PXOR

bitwise logical XOR 

 

Shift and Rotate Instructions (MMX)

The shift and rotate instructions operate on packed bytes, words, doublewords, or quadwords in 64–bit operands.

Table 3–25 Shift and Rotate Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

pslld

PSLLD

shift packed doublewords left logical 

 

psllq

PSLLQ

shift packed quadword left logical 

 

psllw

PSLLW

shift packed words left logical 

 

psrad

PSRAD

shift packed doublewords right arithmetic 

 

psraw

PSRAW

shift packed words right arithmetic 

 

psrld

PSRLD

shift packed doublewords right logical 

 

psrlq

PSRLQ

shift packed quadword right logical 

 

psrlw

PSRLW

shift packed words right logical 

 

State Management Instructions (MMX)

The emms (EMMS) instruction clears the MMX state from the MMX registers.

Table 3–26 State Management Instructions (MMX)

Solaris Mnemonic 

Intel/AMD Mnemonic 

Description 

Notes 

emms

EMMS

empty MMX state