The following instructions control caching, prefetching, and instruction ordering.
Table 3–35 Miscellaneous Instructions (SSE)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
MASKMOVQ |
non-temporal store of selected bytes from an MMX register into memory | ||
MOVNTPS |
non-temporal store of four packed single-precision floating-point values from an XMM register into memory | ||
MOVNTQ |
non-temporal store of quadword from an MMX register into memory | ||
PREFETCHNTA |
prefetch data into non-temporal cache structure and into a location close to the processor | ||
PREFETCHT0 |
prefetch data into all levels of the cache hierarchy | ||
PREFETCHT1 |
prefetch data into level 2 cache and higher | ||
PREFETCHT2 |
prefetch data into level 2 cache and higher | ||
SFENCE |
serialize store operations |