The MMX instructions enable x86 processors to perform single-instruction, multiple-data(SIMD) operations on packed byte, word, doubleword, or quadword integer operands contained in memory, in MMX registers, or in general-purpose registers.
The data transfer instructions move doubleword and quadword operands between MMX registers and between MMX registers and memory.
Table 3–20 Data Transfer Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
MOVD |
move doubleword |
movdq valid only under -xarch=amd64 |
|
MOVQ |
move quadword |
valid only under -xarch=amd64 |
The conversion instructions pack and unpack bytes, words, and doublewords.
Table 3–21 Conversion Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
PACKSSDW |
pack doublewords into words with signed saturation | ||
PACKSSWB |
pack words into bytes with signed saturation | ||
PACKUSWB |
pack words into bytes with unsigned saturation | ||
PUNPCKHBW |
unpack high-order bytes | ||
PUNPCKHDQ |
unpack high-order doublewords | ||
PUNPCKHWD |
unpack high-order words | ||
PUNPCKLBW |
unpack low-order bytes | ||
PUNPCKLDQ |
unpack low-order doublewords | ||
PUNPCKLWD |
unpack low-order words |
The packed arithmetic instructions perform packed integer arithmetic on packed byte, word, and doubleword integers.
Table 3–22 Packed Arithmetic Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
PADDB |
add packed byte integers | ||
PADDD |
add packed doubleword integers | ||
PADDSB |
add packed signed byte integers with signed saturation | ||
PADDSW |
add packed signed word integers with signed saturation | ||
PADDUSB |
add packed unsigned byte integers with unsigned saturation | ||
PADDUSW |
add packed unsigned word integers with unsigned saturation | ||
PADDW |
add packed word integers | ||
PMADDWD |
multiply and add packed word integers | ||
PMULHW |
multiply packed signed word integers and store high result | ||
PMULLW |
multiply packed signed word integers and store low result | ||
PSUBB |
subtract packed byte integers | ||
PSUBD |
subtract packed doubleword integers | ||
PSUBSB |
subtract packed signed byte integers with signed saturation | ||
PSUBSW |
subtract packed signed word integers with signed saturation | ||
PSUBUSB |
subtract packed unsigned byte integers with unsigned saturation | ||
PSUBUSW |
subtract packed unsigned word integers with unsigned saturation | ||
PSUBW |
subtract packed word integers |
The compare instructions compare packed bytes, words, or doublewords.
Table 3–23 Comparison Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
PCMPEQB |
compare packed bytes for equal | ||
PCMPEQD |
compare packed doublewords for equal | ||
PCMPEQW |
compare packed words for equal | ||
PCMPGTB |
compare packed signed byte integers for greater than | ||
PCMPGTD |
compare packed signed doubleword integers for greater than | ||
PCMPGTW |
compare packed signed word integers for greater than |
The logical instructions perform logical operations on quadword operands.
Table 3–24 Logical Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
PAND |
bitwise logical AND | ||
PANDN |
bitwise logical AND NOT | ||
POR |
bitwise logical OR | ||
PXOR |
bitwise logical XOR |
The shift and rotate instructions operate on packed bytes, words, doublewords, or quadwords in 64–bit operands.
Table 3–25 Shift and Rotate Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
pslld |
PSLLD |
shift packed doublewords left logical | |
psllq |
PSLLQ |
shift packed quadword left logical | |
psllw |
PSLLW |
shift packed words left logical | |
psrad |
PSRAD |
shift packed doublewords right arithmetic | |
psraw |
PSRAW |
shift packed words right arithmetic | |
psrld |
PSRLD |
shift packed doublewords right logical | |
psrlq |
PSRLQ |
shift packed quadword right logical | |
psrlw |
PSRLW |
shift packed words right logical |
The emms (EMMS) instruction clears the MMX state from the MMX registers.
Table 3–26 State Management Instructions (MMX)
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
emms |
EMMS |
empty MMX state |