64–Bit AMD Opteron Considerations

To assemble code for the AMD Opteron CPU, invoke the assembler with the -xarch=amd64 command line option. See the as(1) man page for additional information.

The following Solaris mnemonics are only valid when the -xarch=amd64 command line option is specified:

`adcq`	`cmovnoq`	`mulq`
`addq`	`cmovnpq`	`negq`
`andq`	`cmovnsq`	`notq`
`bsfq`	`cmovnzq`	`orq`
`bsrq`	`cmovoq`	`popfq`
`bswapq`	`cmovpeq`	`popq`
`btcq`	`cmovpoq`	`pushfq`
`btq`	`cmovpq`	`pushq`
`btrq`	`cmovsq`	`rclq`
`btsq`	`cmovzq`	`rcrq`
`cltq`	`cmpq`	`rolq`
`cmovaeq`	`cmpsq`	`rorq`
`cmovaq`	`cmpxchgq`	`salq`
`cmovbeq`	`cqtd`	`sarq`
`cmovbq`	`cqto`	`sbbq`
`cmovcq`	`decq`	`scasq`
`cmoveq`	`divq`	`shldq`
`cmovgeq`	`idivq`	`shlq`
`cmovgq`	`imulq`	`shrdq`
`cmovleq`	`incq`	`shrq`
`cmovlq`	`larq`	`sldtq`
`cmovnaeq`	`leaq`	`smswq`
`cmovnaq`	`lodsq`	`stosq`
`cmovnbeq`	`lslq`	`strq`
`cmovnbq`	`movabs`	`subq`
`cmovncq`	`movdq`	`testq`
`cmovneq`	`movntiq`	`xaddq`
`cmovngeq`	`movq`	`xchgq`
`cmovngq`	`movsq`	`xchgqA`
`cmovnleq`	`movswq`	`xorq`
`cmovnlq`	`movzwq`

The following Solaris mnemonics are not valid when the -xarch=amd64 command line option is specified:

`aaa`	`daa`	`lesw`
`aad`	`das`	`popa`
`aam`	`into`	`popaw`
`aas`	`jecxz`	`pusha`
`boundw`	`ldsw`	`pushaw`

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