Miscellaneous Instructions (SSE)

The following instructions control caching, prefetching, and instruction ordering.

Table 3–35 Miscellaneous Instructions (SSE)


Solaris Mnemonic	Intel/AMD Mnemonic	Description
`maskmovq`	`MASKMOVQ`	non-temporal store of selected bytes from an MMX register into memory
`movntps`	`MOVNTPS`	non-temporal store of four packed single-precision floating-point values from an XMM register into memory
`movntq`	`MOVNTQ`	non-temporal store of quadword from an MMX register into memory
`prefetchnta`	`PREFETCHNTA`	prefetch data into non-temporal cache structure and into a location close to the processor
`prefetcht0`	`PREFETCHT0`	prefetch data into all levels of the cache hierarchy
`prefetcht1`	`PREFETCHT1`	prefetch data into level 2 cache and higher
`prefetcht2`	`PREFETCHT2`	prefetch data into level 2 cache and higher
`sfence`	`SFENCE`	serialize store operations