A DMA engine on an SBus in a SPARC machine has the following attributes:
It can access only addresses ranging from 0xFF000000 to 0xFFFFFFFF.
It has a 32-bit DMA counter register.
It can handle byte-aligned transfers.
It supports 1-, 2- and 4-byte burst sizes.
It has a minimum effective transfer size of 1 byte.
It has a 32-bit address register.
It doesn't have a scatter-gather list.
The device operates on sectors only (for example a disk).
The resulting attribute structure is:
static ddi_dma_attr_t attributes = {
DMA_ATTR_V0, /* Version number */
0xFF000000, /* low address */
0xFFFFFFFF, /* high address */
0xFFFFFFFF, /* counter register max */
1, /* byte alignment */
0x7, /* burst sizes: 0x1 | 0x2 | 0x4 */
0x1, /* minimum transfer size */
0xFFFFFFFF, /* max xfer size */
0xFFFFFFFF, /* address register max */
1, /* no scatter-gather */
512, /* device operates on sectors */
0, /* attr flag: set to 0 */
};