fdiv{ls}
Divide stack element 0 by stack element 7 and return the result to stack element 0.
fdiv %st(7), %st
fdivp
Divide stack element 7 by stack element 0 and return the result to stack element 7, then pop the stack.
fdivp %st, %st(7)
fdivr{ls}
Divide stack element 0 by stack element 7 and return the result to stack element 7.
fdivr %st, %st(7)
fdivrp
Divide stack element 0 by stack element 7 and return the result to stack element 7, then pop the stack.
fdivrp %st, %st(7)
fidiv{l}
Divide stack element 0 by the integer contents of register ECX, with an offset of 2, and return the result to register ECX.
fidiv 2(%ecx)
fidivr{l}
Divide the integer contents of register ECX, with an offset of 2, by stack element 0 and return the result to stack element 0.
fidivr 2(%ecx)
The IA-32 Assembler generates the wrong object code for some of the floating-point opcodes fsub, fsubr, fdiv, and fdivr when there are two floating register operands, and the second op destination is not the zeroth floating-point register. This error has been made in many IA-32 assemblers and would probably cause problems if it were fixed.
Replace the following instructions, in column 1, with their substitutions, in column 2, for IA--32 platforms:
Table 2-11 Floating-point Opcodes
fsub %st,%st(n) |
fsubr %st, %st(n) |
---|---|
fsubp %st,%st(n) |
fsubrp %st, %st(n) |
fsub |
fsubr |
fsubr %st,%st(n) |
fsub %st, %st(n) |
fsubrp %st,%st(n) |
fsubp %st, %st(n) |
fsubr |
fsub |
fdiv %st,%st(n) |
fdivr %st,%st(n) |
fdivp %st,%st(n) |
fdivrp %st,%st(n) |
fdiv |
fdivr |
fdivr %st, %st(n) |
fdvir %st, %st(n) |
fdivrp %st, %st(n) |
fdivp %st, %st(n) |
fdivr |
fdiv |