Introduction

Although the Intel processor supports address-size attributes of either 16 or 32 bits, the x86 assembler only supports address-size attributes of 32 bits. The operand-size is either 16 or 32 bits. An instruction that accesses 16-bit words or 32-bit longs has an operand-size attribute of either 16 or 32 bits.

Notational Conventions

The notational conventions used in the instructions included in this chapter are described below:

• The mnemonics are expressed in a regular expression-type syntax.

• When a group of letters is separated from other letters by a bar (|) within square brackets or curly braces, then the group of letters between the bars or between a bar and a closing bracket or brace is considered an atomic unit.

  For example, fld[lst] means fldl, flds, or fldt; fst{ls} means fst, fstl, or fsts; and fild{l|ll} means fild, fildl, or fildll.

• Square brackets ([]) denote choices, but at least one is required.

• Alternatives enclosed within curly braces ({}) denote that you can use one or none of them

• The vertical bar separates different suffixes for operators or operands. For example, the following indicates that an 8-, 16-, or 32-bit immediate value is permitted in an instruction:

  	imm[8|16|32]

• The SunOS operators are built from the Intel operators by adding suffixes to them. The 80387, 80486 deals with three data types: integer, packed decimal, and real.

  The SunOS assembler is not typed; the operator has to carry with it the type of data item it is operating on. If the operation is on an integer, the following suffixes apply: none for Intel's short (16 bits), l for Intel's long (32 bits), and ll for Intel's longlong (64 bits). If the operator applies to reals, then: s is short (32 bits), l is long (64 bits), and t is temporary real(80 bits).

• reg[8|16|32] defines a general-purpose register, where each number indicates one of the following:

  	32: %eax, %ecx, %edx, %ebx, %esi, %edi, %ebp, %esp
  	16: %ax, %cx, %dx, %bx, %si, %di, %bp, %sp
  	 8: %al, %ah, %cl, %ch, %dl, %dh, %bl, %bh

• imm[8|16|32|48] -- an immediate value. You define immediate values using the regular expression syntax previously described (see also Expressions and Immediate Values on page 210). If there is a choice between operand sizes, the assembler will choose the smallest representation.

• mem[8|16|32|48|64|80] -- a memory operand; the 8, 16, 32, 48, 64, and 80 suffixes represent byte, word, long (or float), inter-segment, double, and long double memory address quantities, respectively.

• creg -- a control register; the control registers are: %cr0, %cr2, %cr3, or %cr4.

• r/m[8|16|32] is a general-purpose register or memory operand; the operand type is determined from the suffix. They are: 8 = byte, 16 = word, and 32 = long. The registers for each operand size are the same as reg[8|16|32] above.

• dreg is a debug register; the debug registers are: %db0, %db1, %db2, %db3, %db6, %db7.

• sreg is a segment register. The 16-bit segment registers are: %cs, %ds, %ss, %es, %fs, and %gs.

• treg is a test register. The test registers are: %tr6 and %tr7.

• freg* is floating-point registers %st (%st(0)), %st(1) - %st(7).

• An instruction can act on zero or more operands. An operand can be any of the following:

  • an immediate operand (in the instruction itself)

  • a register (32-bit genera, segment, or status/instruction register), (16-bit word register), and (8-bit byte register).

  • a pointer to a memory location.

  • an I/O port

• Instruction syntax is:

  operand1 -> operand2

  where operand1 and operand2 are operated on and the result stored in operand2. The -> arrow shows the direction. The direction is opposite of that described in the Intel Corporation i486 Microprocessor Programmer's Reference Manual.

• disp[8|32] -- the number of bits used to define the distance of a relative jump; because the assembler only supports a 32-bit address space, only 8-bit sign extended and 32-bit addresses are supported.

• immPtr -- an immediate pointer; when the immediate form of a long call or a long jump is used, the selector and offset are encoded as an immediate pointer. An immediate pointer consists of $imm16, $imm32 where the first immediate value represents the segment and the second represents the offset.

• cc -- condition codes; the 30 condition codes are:

References

This document presumes that you are familiar with the manner in which the Intel instruction sets function. For more information on specific instruction descriptions, please refer to the Intel Corporation i486 Microprocessor Programmer's Reference Manual.