test{bwl} reg[8|16|32], r/m[8|16|32] test{bwl} r/m[8|16|32], reg[8|16|32] test{bwl} imm[8|16|32], r/m[8|16|32]
reg[8|16|32] and r/m[8|16|32] -> r/m[8|16|32]
r/m[8|16|32] and reg[8|16|32] -> reg[8|16|32]
imm[8|16|32] and r/m[8|16|32] -> r/m[8|16|32]
Performs a bit-wise logical AND of the two operands. The result of a bit-wise logical AND is 1 if the value of that bit in both operands is 1; otherwise, the result is 0. test discards the results and modifies the flags. The OF and CF flags are cleared; SF, ZF and PF flags are set according to the result.
Perform a logical AND of the constant, 0xff, and the 8-bit contents of the effective address (addressed by the ESI register plus an offset of 1):
testb $0xff, 1(%esi)
Perform a logical AND of the 16-bit contents of the DX register and the contents of the effective address (addressed by the EDI register plus an offset of 4):
testw %dx, 4(%edi)
Perform a logical AND of the constant, 0xffeeddcc, and the 32-bit contents of the effective address (addressed by the EDI register plus an offset of 4):
testl $0xffeeddcc, 4(%edi)