Writing Device Drivers

ddi_device_acc_attr Structure

This structure describes the endian and data ordering requirements of the device. The driver is required to initialize and pass one of these structures as an argument to ddi_regs_map_setup(9F).

typedef struct ddi_device_acc_attr {
        ushort_t       devacc_attr_version;
        uchar_t        devacc_attr_endian_flags;
        uchar_t        devacc_attr_dataorder;
} ddi_device_acc_attr_t;
devacc_attr_version

Specifies DDI_DEVICE_ATTR_V0

devacc_attr_endian_flags

Describes the endian characteristics of the device. Specified as a bit value whose possible values are:

  • DDI_NEVERSWAP_ACC – Never swap data

  • DDI_STRUCTURE_BE_ACC – The device data format is big-endian

  • DDI_STRUCTURE_LE_ACC – The device data format is little-endian

devacc_attr_dataorder

Describes the order in which the CPU must reference data as required by the device. Specified as an enumerated value, where data access restrictions are ordered from most to least strict.

  • DDI_STRICTORDER_ACC – The host must issue the references in order, as specified by the programmer. This is the default behavior.

  • DDI_UNORDERED_OK_ACC – The host is allowed to reorder loads and stores to device memory.

  • DDI_MERGING_OK_ACC – The host is allowed to merge individual stores to consecutive locations. This setting also implies reordering.

  • DDI_LOADCACHING_OK_ACC – The host is allowed to read data from the device until a store occurs.

  • DDI_STORECACHING_OK_ACC – The host is allowed to cache data written to the device and defer writing it to the device until some future time.


Note –

The system can access data more strictly than the driver specified in devacc_attr_dataorder. The restriction to the host diminishes while moving from strict data ordering to cache storing in terms of data accesses by the driver.