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location
- List of component locations, separated by forward slashes and comprised of:
board_loc/proc/bank/logical_bank
board_loc/proc/bank/all_dimms_on_that_bank
board_loc/proc/all_banks_on_that_proc
board_loc/all_banks_on_that_board
board_loc/proc
board_loc/procs
board_loc/cassette
board_loc/bus
board_loc/paroli_link
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- Multiple location arguments are permitted separated by a space.
The location forms are optional and are used to specify particular components on boards in specific locations.
For example, the location SB5/P0/B1/L1 indicates Logical Bank 1 of Bank 1 on Processor 0 at SB5.
The SB0/PP1 location indicates Processor Pair 1 at SB0. The CS0/ABUS1 location indicates address bus 1 at CS0.
The following board_loc forms are accepted:
Sun Fire 15K, Sun Fire 12K
SB(0...17), SB(0...8)
IO(0...17), IO(0...8)
CS(0|1), CS(0|1)
EX(0...17), EX(0...8)
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- Processor locations indicate single processors or processor pairs.
There are four possible processors on a CPU/Memory board. Processor pairs on that board are: procs 0 and 1, and procs 2 and 3.
Note – If you blacklist a single CPU/Mem processor in a processor pair neither processor is used. The MaxCPU has two processors,: procs 0 and 1, and only one proc pair (PP0). Using PP1 for this board will cause disablecomponent to exit and display an error message.
The following proc forms are accepted:
P(0...3) PP(0|1)
The following bank forms are accepted:
B(0|1)
The following logical_bank forms are accepted:
L(0|1)
The following all_dimms_on_that_bank forms are accepted:
D
The following all_banks_on_that_proc forms are accepted:
B
The following all_banks_on_that_board forms are accepted:
B
The following paroli_link forms are accepted:
PAR(0|1)
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- The hsPCI assemblies contain hot-swappable cassettes.
The following hsPCI forms are accepted:
C(3|5)V(0|1)
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- There are three bus locations: address, data and response.
The following bus forms are accepted:
ABUS|DBUS|RBUS (0|1)
