Fortran User's Guide

-xarch=a

Specify target architecture instruction set.

    SPARC: 77/90 x86:77

Target architectures specified by keyword a are:

Table 3-19 -xarch Architecture Keywords

On SPARC:

 generic, v7, v8a, v8, v8plus, v8plusa, v9, v9a

On x86:

 generic, 386, pentium_pro

Although this option can be used alone, it is part of the expansion of the -xtarget option; it is provided to allow overriding the -xarch value implied by a specific -xtarget option.

This option limits the instructions generated to those of the specified architecture, and allows the specified set of instructions. It does not guarantee that target-specific instructions are used.

If this option is used with optimization, the appropriate choice can provide good performance of the executable on the specified architecture. An inappropriate choice can result in serious degradation of performance.

For SPARC Platforms:

SPARC architectures v7, v8, and v8a are all binary compatible. v8plus and v8plusa are binary compatible with each other and forward, but not backward compatible with earlier architectures.

v9 and v9a are only available on 64-bit Solaris 7 environments, and are binary compatible with each other but not compatible with earlier architectures.

For any particular choice, the generated executable may run much more slowly on earlier architectures.

generic: Get good performance on most systems.

This is the default. This option uses the best instruction set for good performance on most processors without major performance degradation on any of them. With each new release, the definition of "best" instruction set may be adjusted, if appropriate.

v7: Limit the instruction set to V7 architecture.

This option uses the best instruction set for good performance on the V7 architecture, but without the quad-precision floating-point instructions.

This is equivalent to using the best instruction set for good performance on the V8 architecture, but without:

- The quad-precision floating-point instructions

- The integer mul and div instructions

- The fsmuld instruction

Examples: SPARCstation 1, SPARCstation 2

v8a: Limit the instruction set to the V8a version of the V8 architecture.

By definition, V8a means the V8 architecture, but without:

- The quad-precision floating-point instructions

- The fsmuld instruction

This option uses the best instruction set for good performance on the V8a architecture.

Example: Any machine based on the MicroSPARC I chip architecture

v8: Limit the instruction set to V8 architecture.

This option uses the best instruction set for good performance on the V8 architecture, but without quad-precision floating-point instructions.

Example: SPARCstation 10

v8plus: Limit instructions to the V8plus version of the V9 architecture.

By definition, V8plus means the V9 architecture, except:

- Without the quad-precision floating-point instructions

- Limited to the 32-bit subset defined by the V8plus specification

- Without the VIS instructions

This option uses the best instruction set for good performance on the V8plus chip architecture. In V8plus, a system with the 64-bit registers of V9 runs in 32-bit addressing mode, but the upper 32 bits of the ix and lx registers must not affect program results.

Example: Any machine based on the UltraSPARC chip architecture

Use of -xarch=v8plus causes the .o file to be marked as a V8+ binary. Such binaries will not run on a V7 or V8 machine.

v8plusa: Limit the instruction set to the V8plusa architecture variation.

By definition, V8plusa, means the V8plus architecture, plus:

- The UltraSPARC-specific instructions

- The VIS instructions

This option uses the best instruction set for good performance on the UltraSPARC(TM) architecture, but limited to the 32-bit subset defined by the V8plus specification.

Example: Any machine based on the UltraSPARC chip architecture

Use of -xarch=v8plusa also causes the .o file to be marked as a Sun-specific V8plus binary. Such binaries will not run on a V7 or V8 machine.

v9: Limit instruction set to the SPARC-V9 architecture.

The resulting .o object files are in 64-bit ELF format and can only be linked with other object files in the same format. The resulting executable can only be run on a 64-bit SPARC processor running 64-bit Solaris 7 with the 64-bit kernel. Compiling with this option uses the best instruction set for good performance on the V9 SPARC architecture, but without the use of quad-precision floating-point instructions. -xarch=v9 is only available when compiling in the 64-bit Solaris 7 environment.

v9a: Limits instruction set to the SPARC-V9 architecture with VIS and UltraSPARC.

This option adds the Visual Instruction Set (VIS) and extensions specific to UltraSPARC processors.

The resulting .o object files are in 64-bit ELF format and can only be linked with other object files in the same format. The resulting executable can only be run on a 64-bit SPARC processor running 64-bit Solaris 7 with the 64-bit kernel. Compiling with this option uses the best instruction set for good performance on the V9 SPARC architecture, but without the use of quad-precision floating-point instructions. -xarch=v9a is only available when compiling in the 64-bit Solaris 7 environment.

For x86 Platforms:

generic and 386 are equivalent in this release.

pentium_pro directs the compiler to issue instructions for the x86 PentiumPro chip.