Defines the cache properties for use by the optimizer.
c must be one of the following:
generic (SPARC,x86)
s1/l1/a1
s1/l1/a1:s2/l2/a2
s1/l1/a1:s2/l2/a2:s3/l3/a3
The si/li/ai are defined as follows:
si |
The size of the data cache at level i, in kilobytes |
li |
The line size of the data cache at level i, in bytes |
ai |
The associativity of the data cache at level i |
Although this option can be used alone, it is part of the expansion of the -xtarget option; its primary use is to override a value supplied by the -xtarget option.
This option specifies the cache properties that the optimizer can use. It does not guarantee that any particular cache property is used.
Table 2-2 The -xcache Values
Value |
Meaning |
---|---|
generic |
Define the cache properties for good performance on most x86 and SPARC architectures.
This is the default value which directs the compiler to use cache properties for good performance on most x86 and SPARC processors, without major performance degradation on any of them.
With each new release, these best timing properties will be adjusted, if appropriate. |
s1/l1/a1 |
Define level 1 cache properties. |
s1/l1/a1:s2/l2/a2 |
Define levels 1 and 2 cache properties. |
s1/l1/a1:s2/l2/a2:s3/l3/a3 |
Define levels 1, 2, and 3 cache properties. |
Example: -xcache=16/32/4:1024/32/1 specifies the following:
Level 1 cache has: 16K bytes 32 bytes line size 4-way associativity |
Level 2 cache has: 1024K bytes 32 bytes line size Direct mapping associativity |