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WRC
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By performing multiple writes and reads, and then verifying the results, the WRC test exercises the FIFO inside the S24 chip. The WRC test is composed of these three subtests: test_afx_alt_wr, test_memafx, and test_afx_random. If these tests fail, they print an error message showing the expected and observed data.
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Test_afx_alt_wr
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This test performs 16 writes to alternative pages, for example, WR (Page1), WR (Page2), WR (Page1+off), WR (Page2+off), and so on. It then reads back the data and compares it with the expected results. This test also writes to the frame buffer space 16 times, followed by a write to a different page in the frame buffer space. The test then reads this data back and verifies it with the expected results.
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Test_memafx
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The CPU in the SWIFT chip has closely coupled interfaces for the DRAM and the AFX bus. This test checks the arbitration between the two accesses.
This test performs a number of alternating writes to the AFX and the CPU memory. After writing to different locations, the test reads and verifies the data. By performing an access across the page boundaries, the test covers both the cached and non-cached accesses.
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Test_afx_random
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After writing to one page in the DRAM memory, the test performs a few random writes/reads to random locations in the AFX space. The test then writes to a different page in the DRAM space, where it performs random accesses.
This test does not perform any data verification, it just checks to see if any of these random accesses caused a time out.
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Constant
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This test writes a data pattern to the whole memory. This pattern is read back and compared with the expected data. Once the memory fill operation is completed, the test reads the memory back and verifies that the value read is correct.
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Address
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This test writes a data pattern (which is same as the value of the address) to the whole memory. This pattern is then read back to verify that it is the correct value.
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Random
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This test writes a random data pattern to the whole memory. This pattern is read back and compared with the expected data. After the memory fill operation is completed, the test reads the memory and verifies the values read are correct.
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Blit
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This test has two parts; the raw blit test and the user blit test.
The raw blit test draws a 64x64x24 pixel image at the top-left corner of screen. Next it blits the image to the screen. The destination images are read back and compared with the original image to verify the raw blit operation has run correctly.
The user blit test draws a 64x64x24 pixel image at the top left corner of screen. It then blits the image to the screen. The destination images are read back and compared with the original image. The user blit test is the same as the raw blit test, except the user blit test uses the user data space for the blit command.
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Stip
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This test performs numerous corner cases for stipple. The test writes to the destination with different data values using a stipple operation. The destination data is read back and verified. For the fast SBus video (SV), the following is checked:
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Walks 1 through pixel mask.
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Walks 1 through ROP bits.
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Walks 1 through destination byte.
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Walks 1 through IDX byte.
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Cursor (does not apply to SPARCstation 4)
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This test performs a data register regression test. It writes a walking 1 pattern to the cursor data registers. The data is then read back and verified with the expected results. The test is repeated using a walking 0 as the data pattern
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Colormap
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Loads all locations in the colormap with varying values of RGB.
Note: If the system being tested has a monochrome or greyscale monitor, visual color problems are undetectable.
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