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Solaris 10 7/07 HW What's New

System Performance Enhancements

The following system performance features and enhancements have been added to the Solaris 10 7/07 HW release.

X Server DTrace Provider

Starting with this release, the X Window System servers include a User-land Statically Defined Tracing (USDT) DTrace provider for instrumenting X11 client connections. The X Window System servers include the following:

For more information about available probes and their arguments, and sample dtrace scripts using them, see http://people.freedesktop.org/~alanc/dtrace/.

Multi-level CMT Scheduling Optimizations

The multi-level Chip Multi-Threaded (CMT) scheduling optimizations feature provides the Solaris kernel with a platform independent mechanism. This mechanism enables discovering and optimizing various performance relevant hardware-sharing relationships existing between CPUs on current and emerging CMT processor architectures, including Niagara II.

This feature also enhances the kernel's thread scheduler or dispatcher with a multilevel CMT load-balancing policy that benefits system performance on various multithreaded, multicore, and multisocket processor-based systems.

For more information on this feature, see the the OpenSolaris performance community website, http://www.opensolaris.org/os/community/performance.

SPARC: UltraSPARC-T1 (Niagara) 2 PCI Express Interface Unit Performance Counter Data

UltraSPARC-T1 (Niagara) 2 systems PCI Express Interface Units (PIU) have built-in performance counters which can be dumped by using busstat. The output of the busstat -l command shows the following devices for such systems:

where # is an instance number.

The use of this built-in performance counter is intended mainly for Sun field service personnel.

Hashed Cache Index Mode Support

Hashed Cache Index mode is a new hardware feature available in Niagara2 processors. The hardware uses many more address bits in order to compute an L2 cache index. As a result, there are more page colors for large pages.

To achieve optimum performance, the Solaris kernel must maximize the number of page colors used by all of the threads sharing a cache. The Solaris virtual memory subsystem has been extended to support this new hardware feature. Correct color calculation improves the performance and throughput consistency of application programs on Niagara2 systems.

MPSS Extended to Shared Memory

The multiple page size support (MPSS) for shared memory feature adds large page support for mapping shared memory and provides an out-of-box (OOB) policy for the use of large pages for shared memory. The MPSS support is for shared memory created by the mmap(1) of /dev/zero or with the MAP_ANON flag, and for System V shared memory. This feature also adds support for memcntl(2) changing the page size of these shared memory segments.

MPSS support is also extended for the use of large pages for memory created by the mmap(1), mmap(MAP_PRIVATE) of /dev/zero.