generic_events
- generic performance counter events
Description
The Solaris cpc(3CPC) subsystem implements a number of predefined, generic performance counter
events. Each generic event maps onto a single platform specific event and
one or more optional attributes. Each hardware platform only need support a
subset of the total set of generic events.
The defined generic events are:
- PAPI_br_cn
Conditional branch instructions
- PAPI_br_ins
Branch instructions
- PAPI_br_msp
Conditional branch instructions mispredicted
- PAPI_br_ntk
Conditional branch instructions not taken
- PAPI_br_prc
Conditional branch instructions correctly predicted
- PAPI_br_tkn
Conditional branch instructions taken
- PAPI_br_ucn
Unconditional branch instructions
- PAPI_bru_idl
Cycles branch units are idle
- PAPI_btac_m
Branch target address cache misses
- PAPI_ca_cln
Requests for exclusive access to clean cache line
- PAPI_ca_inv
Requests for cache invalidation
- PAPI_ca_itv
Requests for cache line intervention
- PAPI_ca_shr
Request for exclusive access to shared cache line
- PAPI_ca_snp
Request for cache snoop
- PAPI_csr_fal
Failed conditional store instructions
- PAPI_csr_suc
Successful conditional store instructions
- PAPI_csr_tot
Total conditional store instructions
- PAPI_fad_ins
Floating point add instructions
- PAPI_fdv_ins
Floating point divide instructions
- PAPI_fma_ins
Floating point multiply and add instructions
- PAPI_fml_ins
Floating point multiply instructions
- PAPI_fnv_ins
Floating point inverse instructions
- PAPI_fp_ins
Floating point instructions
- PAPI_fp_ops
Floating point operations
- PAPI_fp_stal
Cycles the floating point unit stalled
- PAPI_fpu_idl
Cycles the floating point units are idle
- PAPI_fsq_ins
Floating point sqrt instructions
- PAPI_ful_ccy
Cycles with maximum instructions completed
- PAPI_ful_icy
Cycles with maximum instruction issue
- PAPI_fxu_idl
Cycles when units are idle
- PAPI_hw_int
Hardware interrupts
- PAPI_int_ins
Integer instructions
- PAPI_tot_cyc
Total cycles
- PAPI_tot_iis
Instructions issued
- PAPI_tot_ins
Instructions completed
- PAPI_vec_ins
VectorSIMD instructions
- PAPI_l1_dca
Level 1 data cache accesses
- PAPI_l1_dch
Level 1 data cache hits
- PAPI_l1_dcm
Level 1 data cache misses
- PAPI_l1_dcr
Level 1 data cache reads
- PAPI_l1_dcw
Level 1 data cache writes
- PAPI_l1_ica
Level 1 instruction cache accesses
- PAPI_l1_ich
Level 1 instruction cache hits
- PAPI_l1_icm
Level 1 instruction cache misses
- PAPI_l1_icr
Level 1 instruction cache reads
- PAPI_l1_icw
Level 1 instruction cache writes
- PAPI_l1_ldm
Level 1 cache load misses
- PAPI_l1_stm
Level 1 cache store misses
- PAPI_l1_tca
Level 1 cache accesses
- PAPI_l1_tch
Level 1 cache hits
- PAPI_l1_tcm
Level 1 cache misses
- PAPI_l1_tcr
Level 1 cache reads
- PAPI_l1_tcw
Level 1 cache writes
- PAPI_l2_dca
Level 2 data cache accesses
- PAPI_l2_dch
Level 2 data cache hits
- PAPI_l2_dcm
Level 2 data cache misses
- PAPI_l2_dcr
Level 2 data cache reads
- PAPI_l2_dcw
Level 2 data cache writes
- PAPI_l2_ica
Level 2 instruction cache accesses
- PAPI_l2_ich
Level 2 instruction cache hits
- PAPI_l2_icm
Level 2 instruction cache misses
- PAPI_l2_icr
Level 2 instruction cache reads
- PAPI_l2_icw
Level 2 instruction cache writes
- PAPI_l2_ldm
Level 2 cache load misses
- PAPI_l2_stm
Level 2 cache store misses
- PAPI_l2_tca
Level 2 cache accesses
- PAPI_l2_tch
Level 2 cache hits
- PAPI_l2_tcm
Level 2 cache misses
- PAPI_l2_tcr
Level 2 cache reads
- PAPI_l2_tcw
Level 2 cache writes
- PAPI_l3_dca
Level 3 data cache accesses
- PAPI_l3_dch
Level 3 data cache hits
- PAPI_l3_dcm
Level 3 data cache misses
- PAPI_l3_dcr
Level 3 data cache reads
- PAPI_l3_dcw
Level 3 data cache writes
- PAPI_l3_ica
Level 3 instruction cache accesses
- PAPI_l3_ich
Level 3 instruction cache hits
- PAPI_l3_icm
Level 3 instruction cache misses
- PAPI_l3_icr
Level 3 instruction cache reads
- PAPI_l3_icw
Level 3 instruction cache writes
- PAPI_l3_ldm
Level 3 cache load misses
- PAPI_l3_stm
Level 3 cache store misses
- PAPI_l3_tca
Level 3 cache accesses
- PAPI_l3_tch
Level 3 cache hits
- PAPI_l3_tcm
Level 3 cache misses
- PAPI_l3_tcr
Level 3 cache reads
- PAPI_l3_tcw
Level 3 cache writes
- PAPI_ld_ins
Load Instructions
- PAPI_lst_ins
Loadstore Instructions
- PAPI_lsu_idl
Cycles load store units are idle
- PAPI_mem_rcy
Cycles stalled waiting for memory reads
- PAPI_mem_scy
Cycles stalled waiting for memory accesses
- PAPI_mem_wcy
Cycles stalled waiting for memory writes
- PAPI_prf_dm
Data prefetch cache misses
- PAPI_res_stl
Cycles stalled on any resource
- PAPI_sr_ins
Store Instructions
- PAPI_stl_ccy
Cycles with no instructions completed
- PAPI_syc_ins
Synchronization instructions completed
- PAPI_tlb_dm
Data TLB misses
- PAPI_tlb_im
Instruction TLB misses
- PAPI_tlb_sd
TLB shootdowns
- PAPI_tlb_tl
Total TLB misses
The tables below define mappings of generic events to platform events and
any associated attribute for all supported platforms.
Intel Core2 Processors
|
|
|
PAPI_tot_cyc |
0x3c/0x00 |
cpu_clk_unhalted.thread_p/core |
PAPI_tot_ins |
0xc0/0x00 |
inst_retired.any_p |
PAPI_br_ins |
0xc4/0x0c |
br_inst_retired.taken |
PAPI_br_msp |
0xc5/0x00 |
br_inst_retired.mispred |
PAPI_br_ntk |
0xc4/0x03 |
br_inst_retired.pred_not_taken |
pred_taken |
PAPI_br_prc |
0xc4/0x05 |
br_inst_retired.pred_not_taken | pred_taken |
PAPI_hw_int |
0xc8/0x00 |
hw_int_rvc |
PAPI_tot_iis |
0xaa/0x01 |
macro_insts.decoded |
PAPI_l1_dca |
0x43/0x01 |
l1d_all_ref |
PAPI_l1_icm |
0x81/0x00 |
l1i_misses |
PAPI_l1_icr |
0x80/0x00 |
l1i_reads |
PAPI_l1_tcw |
0x41/0x0f |
l1d_cache_st.mesi |
PAPI_l2_stm |
0x2a/0x41 |
l2_st.self.i_state |
PAPI_l2_tca |
0x2e/0x4f |
l2_rqsts.self.demand.mesi |
PAPI_l2_tch |
0x2e/0x4e |
l2_rqsts.mes |
PAPI_l2_tcm |
0x2e/0x41 |
l2_rqsts.self.demand.i_state |
PAPI_l2_tcw |
0x2a/0x4f |
l2_st.self.mesi |
PAPI_ld_ins |
0xc0/0x01 |
inst_retired.loads |
PAPI_lst_ins |
0xc0/0x03 |
inst_retired.loads | stores |
PAPI_sr_ins |
0xc0/0x02 |
inst_retired.stores |
PAPI_tlb_dm |
0x08/0x01 |
dtlb_misses.any |
PAPI_tlb_im |
0x82/0x12 |
itlb.small_miss | large_miss |
PAPI_tlb_tl |
0x0c/0x03 |
page_walks |
PAPI_l1_dcm |
0xcb/0x01 |
mem_load_retired.l1d_miss |
|
Fixed-function counters do not require Event Code and Unit Mask. The generic
event to fixed-function counter event mappings available are:
|
|
PAPI_tot_ins |
instr_retired.any |
PAPI_tot_cyc |
cpu_clk_unhalted.core/thread |
|
Intel Processor 5500 Family (Core i7)
|
|
|
PAPI_tot_cyc |
0x3c/0x00 |
cpu_clk_unhalted.thread_p |
PAPI_tot_ins |
0xc0/0x00 |
inst_retired.any_p |
PAPI_br_cn |
0xc4/0x01 |
br_inst_retired.conditional |
PAPI_hw_int |
0x1d/0x01 |
hw_int.rcx |
PAPI_tot_iis |
0x17/0x01 |
inst_queue_writes |
PAPI_l1_dca |
0x43/0x01 |
l1d_all_ref.any |
PAPI_l1_dcm |
0x24/0x03 |
l2_rqsts.loads | rfos |
PAPI_l1_dcr |
0x40/0x0f |
l1d_cache_ld.mesi |
PAPI_l1_dcw |
0x41/0x0f |
l1d_cache_st.mesi |
PAPI_l1_ica |
0x80/0x03 |
l1i.reads |
PAPI_l1_ich |
0x80/0x01 |
l1i.hits |
PAPI_l1_icm |
0x80/0x02 |
l1i.misses |
PAPI_l1_icr |
0x80/0x03 |
l1i.reads |
PAPI_l1_ldm |
0x24/0x33 |
l2_rqsts.loads | ifetches |
PAPI_l1_tcm |
0x24/0xff |
l2_rqsts.references |
PAPI_l2_ldm |
0x24/0x02 |
l2_rqsts.ld_miss |
PAPI_l2_stm |
0x24/0x08 |
l2_rqsts.rfo_miss |
PAPI_l2_tca |
0x24/0x3f |
l2_rqsts.loads|rfos|ifetches |
PAPI_l2_tch |
0x24/0x15 |
l2_rqsts.ld_hit,rfo_hit|ifetch_hit |
PAPI_l2_tcm |
0x24/0x2a |
l2_rqsts.ld_miss,rfo_miss|ifetch_miss |
PAPI_l2_tcr |
0x24/0x33 |
l2_rqsts.loads|ifetches |
PAPI_l2_tcw |
0x24/0x0c |
l2_rqsts.rfos |
PAPI_l3_tca |
0x2e/0x4f |
l3_lat_cache.reference |
PAPI_l3_tcm |
0x2e/0x41 |
l3_lat_cache.misses |
PAPI_ld_ins |
0x0b/0x01 |
mem_inst_retired.loads |
PAPI_lst_ins |
0x0b/0x03 |
mem_inst_retired.loads|stores |
PAPI_prf_dm |
0x26/0xf0 |
l2_data_rqsts.prefetch.mesi |
PAPI_sr_ins |
0x0b/0x02 |
mem_inst_retired.stores |
PAPI_tlb_dm |
0x49/0x01 |
dtlb_misses.any |
PAPI_tlb_im |
0x85/0x01 |
itlb_misses.any |
|
For fixed-function counter mappings refer to the Intel Core2 listing above.
Intel Atom Processors
|
|
|
PAPI_br_ins |
0xc4/0x00 |
br_inst_retired.any |
PAPI_br_msp |
0xc5/0x00 |
br_inst_retired.mispred |
PAPI_br_ntk |
0xc4/0x03 |
br_inst_retired.pred_not_taken | mispred_not_taken |
PAPI_br_prc |
0xc4/0x05 |
br_inst_retired.pred_not_taken | pred_taken |
PAPI_hw_int |
0xc8/0x00 |
hw_int_rcv |
PAPI_tot_iis |
0xaa/0x03 |
macro_insts.all_decoded |
PAPI_l1_dca |
0x40/0x23 |
l1d_cache.l1 | st |
PAPI_l2_stm |
0x2a/0x41 |
l2_st.self.i_state |
PAPI_l2_tca |
0x2e/0x4f |
longest_lat_cache.reference |
PAPI_l2_tch |
0x2e/0x4e |
l2_rqsts.mes |
PAPI_l2_tcm |
0x2e/0x41 |
longest_lat_cache.miss |
PAPI_l2_tcw |
0x2a/0x4f |
l2_st.self.mesi |
PAPI_tlb_dm |
0x08/0x07 |
data_tlb_misses.dtlb.miss |
PAPI_tlb_im |
0x82/0x02 |
itlb.misses |
|
For fixed-function counter mappings refer to the Intel Core2 listing above.
AMD Opteron Family 0xF Processor
|
|
|
PAPI_br_ins |
FR_retired_branches_w_excp_intr |
0x0 |
PAPI_br_msp |
FR_retired_branches_mispred |
0x0 |
PAPI_br_tkn |
FR_retired_taken_branches |
0x0 |
PAPI_fp_ops |
FP_dispatched_fpu_ops |
0x3 |
PAPI_fad_ins |
FP_dispatched_fpu_ops |
0x1 |
PAPI_fml_ins |
FP_dispatched_fpu_ops |
0x2 |
PAPI_fpu_idl |
FP_cycles_no_fpu_ops_retired |
0x0 |
PAPI_tot_cyc |
BU_cpu_clk_unhalted |
0x0 |
PAPI_tot_ins |
FR_retired_x86_instr_w_excp_intr |
0x0 |
PAPI_l1_dca |
DC_access |
0x0 |
PAPI_l1_dcm |
DC_miss |
0x0 |
PAPI_l1_ldm |
DC_refill_from_L2 |
0xe |
PAPI_l1_stm |
DC_refill_from_L2 |
0x10 |
PAPI_l1_ica |
IC_fetch |
0x0 |
PAPI_l1_icm |
IC_miss |
0x0 |
PAPI_l1_icr |
IC_fetch |
0x0 |
PAPI_l2_dch |
DC_refill_from_L2 |
0x1e |
PAPI_l2_dcm |
DC_refill_from_system |
0x1e |
PAPI_l2_dcr |
DC_refill_from_L2 |
0xe |
PAPI_l2_dcw |
DC_refill_from_L2 |
0x10 |
PAPI_l2_ich |
IC_refill_from_L2 |
0x0 |
PAPI_l2_icm |
IC_refill_from_system |
0x0 |
PAPI_l2_ldm |
DC_refill_from_system |
0xe |
PAPI_l2_stm |
DC_refill_from_system |
0x10 |
PAPI_res_stl |
FR_dispatch_stalls |
0x0 |
PAPI_stl_icy |
FR_nothing_to_dispatch |
0x0 |
PAPI_hw_int |
FR_taken_hardware_intrs |
0x0 |
PAPI_tlb_dm |
DC_dtlb_L1_miss_L2_miss |
0x0 |
PAPI_tlb_im |
IC_itlb_L1_miss_L2_miss |
0x0 |
PAPI_fp_ins |
FR_retired_fpu_instr |
0xd |
PAPI_vec_ins |
FR_retired_fpu_instr |
0x4 |
|
AMD Opteron Family 0x10 Processors
|
|
|
PAPI_br_ins |
FR_retired_branches_w_excp_intr |
0x0 |
PAPI_br_msp |
FR_retired_branches_mispred |
0x0 |
PAPI_br_tkn |
FR_retired_taken_branches |
0x0 |
PAPI_fp_ops |
FP_dispatched_fpu_ops |
0x3 |
PAPI_fad_ins |
FP_dispatched_fpu_ops |
0x1 |
PAPI_fml_ins |
FP_dispatched_fpu_ops |
0x2 |
PAPI_fpu_idl |
FP_cycles_no_fpu_ops_retired |
0x0 |
PAPI_tot_cyc |
BU_cpu_clk_unhalted |
0x0 |
PAPI_tot_ins |
FR_retired_x86_instr_w_excp_intr |
0x0 |
PAPI_l1_dca |
DC_access |
0x0 |
PAPI_l1_dcm |
DC_miss |
0x0 |
PAPI_l1_ldm |
DC_refill_from_L2 |
0xe |
PAPI_l1_stm |
DC_refill_from_L2 |
0x10 |
PAPI_l1_ica |
IC_fetch |
0x0 |
PAPI_l1_icm |
IC_miss |
0x0 |
PAPI_l1_icr |
IC_fetch |
0x0 |
PAPI_l2_dch |
DC_refill_from_L2 |
0x1e |
PAPI_l2_dcm |
DC_refill_from_system |
0x1e |
PAPI_l2_dcr |
DC_refill_from_L2 |
0xe |
PAPI_l2_dcw |
DC_refill_from_L2 |
0x10 |
PAPI_l2_ich |
IC_refill_from_L2 |
0x0 |
PAPI_l2_icm |
IC_refill_from_system |
0x0 |
PAPI_l2_ldm |
DC_refill_from_system |
0xe |
PAPI_l2_stm |
DC_refill_from_system |
0x10 |
PAPI_res_stl |
FR_dispatch_stalls |
0x0 |
PAPI_stl_icy |
FR_nothing_to_dispatch |
0x0 |
PAPI_hw_int |
FR_taken_hardware_intrs |
0x0 |
PAPI_tlb_dm |
DC_dtlb_L1_miss_L2_miss |
0x7 |
PAPI_tlb_im |
IC_itlb_L1_miss_L2_miss |
0x3 |
PAPI_fp_ins |
FR_retired_fpu_instr |
0xd |
PAPI_vec_ins |
FR_retired_fpu_instr |
0x4 |
PAPI_l3_dcr |
L3_read_req |
0xf1 |
PAPI_l3_icr |
L3_read_req |
0xf2 |
PAPI_l3_tcr |
L3_read_req |
0xf7 |
PAPI_l3_stm |
L3_miss |
0xf4 |
PAPI_l3_ldm |
L3_miss |
0xf3 |
PAPI_l3_tcm |
L3_miss |
0xf7 |
|
Intel Pentium IV Processor
|
|
|
PAPI_br_msp |
branch_retired |
0xa |
PAPI_br_ins |
branch_retired |
0xf |
PAPI_br_tkn |
branch_retired |
0xc |
PAPI_br_ntk |
branch_retired |
0x3 |
PAPI_br_prc |
branch_retired |
0x5 |
PAPI_tot_ins |
instr_retired |
0x3 |
PAPI_tot_cyc |
global_power_events |
0x1 |
PAPI_tlb_dm |
page_walk_type |
0x1 |
PAPI_tlb_im |
page_walk_type |
0x2 |
PAPI_tlb_tm |
page_walk_type |
0x3 |
PAPI_l2_ldm |
BSQ_cache_reference |
0x100 |
PAPI_l2_stm |
BSQ_cache_reference |
0x400 |
PAPI_l2_tcm |
BSQ_cache_reference |
0x500 |
|
Intel Pentium Pro/II/III Processor
|
|
|
PAPI_ca_shr |
l2_ifetch |
0xf |
PAPI_ca_cln |
bus_tran_rfo |
0x0 |
PAPI_ca_itv |
bus_tran_inval |
0x0 |
PAPI_tlb_im |
itlb_miss |
0x0 |
PAPI_btac_m |
btb_misses |
0x0 |
PAPI_hw_int |
hw_int_rx |
0x0 |
PAPI_br_cn |
br_inst_retired |
0x0 |
PAPI_br_tkn |
br_taken_retired |
0x0 |
PAPI_br_msp |
br_miss_pred_taken_ret |
0x0 |
PAPI_br_ins |
br_inst_retired |
0x0 |
PAPI_res_stl |
resource_stalls |
0x0 |
PAPI_tot_iis |
inst_decoder |
0x0 |
PAPI_tot_ins |
inst_retired |
0x0 |
PAPI_tot_cyc |
cpu_clk_unhalted |
0x0 |
PAPI_l1_dcm |
dcu_lines_in |
0x0 |
PAPI_l1_icm |
l2_ifetch |
0xf |
PAPI_l1_tcm |
l2_rqsts |
0xf |
PAPI_l1_dca |
data_mem_refs |
0x0 |
PAPI_l1_ldm |
l2_ld |
0xf |
PAPI_l1_stm |
l2_st |
0xf |
PAPI_l2_icm |
bus_tran_ifetch |
0x0 |
PAPI_l2_dcr |
l2_ld |
0xf |
PAPI_l2_dcw |
l2_st |
0xf |
PAPI_l2_tcm |
l2_lines_in |
0x0 |
PAPI_l2_tca |
l2_rqsts |
0xf |
PAPI_l2_tcw |
l2_st |
0xf |
PAPI_l2_stm |
l2_m_lines_inm |
0x0 |
PAPI_fp_ins |
flops |
0x0 |
PAPI_fp_ops |
flops |
0x0 |
PAPI_fml_ins |
mul |
0x0 |
PAPI_fdv_ins |
div |
0x0 |
|
UltraSPARC I/II Processor
|
|
PAPI_tot_cyc |
Cycle_cnt |
PAPI_tot_ins |
Instr_cnt |
PAPI_tot_iis |
Instr_cnt |
PAPI_l1_dcr |
DC_rd |
PAPI_l1_dcw |
DC_wr |
PAPI_l1_ica |
IC_ref |
PAPI_l1_ich |
IC_hit |
PAPI_l2_tca |
EC_ref |
PAPI_l2_dch |
EC_rd_hit |
PAPI_l2_tch |
EC_hit |
PAPI_l2_ich |
EC_ic_hit |
PAPI_ca_inv |
EC_snoop_inv |
PAPI_br_msp |
Dispatch0_mispred |
PAPI_ca_snp |
EC_snoop_cb |
|
UltraSPARC III/IIIi/IV Processor
|
|
PAPI_tot_cyc |
Cycle_cnt |
PAPI_tot_ins |
Instr_cnt |
PAPI_tot_iis |
Instr_cnt |
PAPI_fma_ins |
FA_pipe_completion |
PAPI_fml_ins |
FM_pipe_completion |
PAPI_l1_dcr |
DC_rd |
PAPI_l1_dcw |
DC_wr |
PAPI_l1_ica |
IC_ref |
PAPI_l1_icm |
IC_miss |
PAPI_l2_tca |
EC_ref |
PAPI_l2_ldm |
EC_rd_miss |
PAPI_l2_tcm |
EC_misses |
PAPI_l2_icm |
EC_ic_miss |
PAPI_tlb_dm |
DTLB_miss |
PAPI_tlb_im |
ITLB_miss |
PAPI_br_ntk |
IU_Stat_Br_count_untaken |
PAPI_br_msp |
Dispatch0_mispred |
PAPI_br_tkn |
IU_Stat_Br_count_taken |
PAPI_ca_inv |
EC_snoop_inv |
PAPI_ca_snp |
EC_snoop_cb |
|
UltraSPARC IV+ Processor
|
|
PAPI_tot_cyc |
Cycle_cnt |
PAPI_tot_ins |
Instr_cnt |
PAPI_tot_iis |
Instr_cnt |
PAPI_fma_ins |
FA_pipe_completion |
PAPI_fml_ins |
FM_pipe_completion |
PAPI_l1_dcr |
DC_rd |
PAPI_l1_stm |
DC_wr_miss |
PAPI_l1_ica |
IC_ref |
PAPI_l1_icm |
IC_L2_req |
PAPI_l1_ldm |
DC_rd_miss |
PAPI_l1_dcw |
DC_wr |
PAPI_l2_tca |
L2_ref |
PAPI_l2_ldm |
L2_rd_miss |
PAPI_l2_icm |
L2_IC_miss |
PAPI_l2_stm |
L2_write_miss |
PAPI_l2_tcm |
L2_miss |
PAPI_l3_tcm |
L3_miss |
PAPI_l3_icm |
L3_IC_miss |
PAPI_l3_ldm |
L3_rd_miss |
PAPI_tlb_im |
ITLB_miss |
PAPI_tlb_dm |
DTLB_miss |
PAPI_br_tkn |
IU_stat_br_count_taken |
PAPI_br_ntk |
IU_stat_br_count_untaken |
|
Niagara T1 Processor
|
|
PAPI_tot_cyc |
Cycle_cnt |
PAPI_l2_icm |
L2_imiss |
PAPI_l2_ldm |
L2_dmiss_ld |
PAPI_fp_ins |
FP_instr_cnt |
PAPI_fp_ops |
FP_instr_cnt |
PAPI_l1_icm |
IC_miss |
PAPI_l1_dcm |
DC_miss |
PAPI_tlb_im |
ITLB_miss |
PAPI_tlb_dm |
DTLB_miss |
|
Niagara T2/T2+/T3 Processor
|
|
PAPI_tot_ins |
Instr_cnt |
PAPI_fp_ins |
Instr_FGU_arithmetic |
PAPI_fp_ops |
Instr_FGU_arithmetic |
PAPI_l1_dcm |
DC_miss |
PAPI_l1_icm |
IC_miss |
PAPI_l2_icm |
L2_imiss |
PAPI_l2_ldm |
L2_dmiss_ld |
PAPI_tlb_dm |
DTLB_miss |
PAPI_tlb_im |
ITLB_miss |
PAPI_tlb_tm |
TLB_miss |
PAPI_br_tkn |
Br_taken |
PAPI_br_ins |
Br_completed |
PAPI_ld_ins |
Instr_ld |
PAPI_sr_ins |
Instr_st |
|
SPARC64 VI/VII Processor
|
|
PAPI_tot_cyc |
cycle_counts |
PAPI_tot_ins |
instruction_counts |
PAPI_br_tkn |
branch_instructions |
PAPI_fp_ops |
floating_instructions |
PAPI_fma_ins |
impdep2_instructions |
PAPI_l1_dcm |
op_r_iu_req_mi_go |
PAPI_l1_icm |
if_r_iu_req_mi_go |
PAPI_tlb_dm |
trap_DMMU_miss |
PAPI_tlb_im |
trap_IMMU_miss |
|
Attributes
See attributes(5) for descriptions of the following attributes:
|
|
Interface Stability |
Volatile |
|
See Also
cpc(3CPC), attributes(5)
Notes
Generic names prefixed with “PAPI_” are taken from the University of Tennessee's
PAPI project, http://icl.cs.utk.edu/papi.