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x86 Assembly Language Reference Manual     Oracle Solaris 11 Express 11/10
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1.  Overview of the Solaris x86 Assembler

2.  Solaris x86 Assembly Language Syntax

Lexical Conventions




Symbolic Labels

Numeric Labels




Numerical Constants

Integer Constants

Floating Point Constants

String Constants


Instructions, Operands, and Addressing



Assembler Directives

3.  Instruction Set Mapping


Instructions, Operands, and Addressing

Instructions are operations performed by the CPU. Operands are entities operated upon by the instruction. Addresses are the locations in memory of specified data.


An instruction is a statement that is executed at runtime. An x86 instruction statement can consist of four parts:

See Statements for the description of labels and comments.

The terms instruction and mnemonic are used interchangeably in this document to refer to the names of x86 instructions. Although the term opcode is sometimes used as a synonym for instruction, this document reserves the term opcode for the hexadecimal representation of the instruction value.

For most instructions, the Solaris x86 assembler mnemonics are the same as the Intel or AMD mnemonics. However, the Solaris x86 mnemonics might appear to be different because the Solaris mnemonics are suffixed with a one-character modifier that specifies the size of the instruction operands. That is, the Solaris assembler derives its operand type information from the instruction name and the suffix. If a mnemonic is specified with no type suffix, the operand type defaults to long. Possible operand types and their instruction suffixes are:


Byte (8–bit)


Word (16–bit)


Long (32–bit) (default)


Quadword (64–bit)

The assembler recognizes the following suffixes for x87 floating-point instructions:

[no suffix]

Instruction operands are registers only

l (“long”)

Instruction operands are 64–bit

s (“short”)

Instruction operands are 32–bit

See Chapter 3, Instruction Set Mapping for a mapping between Solaris x86 assembly language mnemonics and the equivalent Intel or AMD mnemonics.


An x86 instruction can have zero to three operands. Operands are separated by commas (,) (ASCII 0x2C). For instructions with two operands, the first (lefthand) operand is the source operand, and the second (righthand) operand is the destination operand (that is, source->destination).

Note - The Intel assembler uses the opposite order (destination<-source) for operands.

Operands can be immediate (that is, constant expressions that evaluate to an inline value), register (a value in the processor number registers), or memory (a value stored in memory). An indirect operand contains the address of the actual operand value. Indirect operands are specified by prefixing the operand with an asterisk (*) (ASCII 0x2A). Only jump and call instructions can use indirect operands.