Description of the illustration l207_285.png
Byte 0: Reserved
Byte 1: Phy Identifier
Byte 2 to 3: Reserved
Byte 4: Reserved Bit 7, Attached Device Type Bit 6 to 4, Reserved Bit 3 to 0
Byte 5: Reserved Bit 7 to 4, Negotiated Physical Link Rate Bit 3 to 0
Byte 6: Reserved Bit 7 to 4, SSP Init. Bit 3, STP Init. Bit 2, SMP Init. Bit 1, Reserved Bit 0
Byte 7: Reserved Bit 7 to 4, SSP Target Bit 3, STP Target Bit 2, SMP Target Bit 1, Reserved Bit 0
Byte 8 to 15: SAS Address
Byte 16 to 23: Attached SAS Address
Byte 24: Attached Phy Address
Byte 25 to 31: Reserved
Byte 32: Programmed Minimum Physical Link Rate Bit 7 to 4, Hardware Minimum Physical Link Rate Bit 3 to 0
Byte 33: Programmed Maximum Physical Link Rate Bit 7 to 4, Hardware Maximum Physical Link Rate Bit 3 to 0
Byte 34 to 41: Reserved
Byte 42 to 43: Vendor Specific
Byte 44 to 47: Reserved