x86 Assembly Language Reference Manual

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Updated: December 2014
 
 

3.18.4 SSE2 Miscellaneous Instructions

The SSE2 instructions described below provide additional functionality for caching non-temporal data when storing data from XMM registers to memory, and provide additional control of instruction ordering on store operations.

Table 3-57  SSE2 Miscellaneous Instructions
Oracle Solaris Mnemonic
Intel/AMD Mnemonic
Description
Notes
clflush
CLFLUSH
flushes and invalidates a memory operand and its associated cache line from all levels of the processor's cache hierarchy
lfence
LFENCE
serializes load operations
maskmovdqu
MASKMOVDQU
non-temporal store of selected bytes from an XMM register into memory
mfence
MFENCE
serializes load and store operations
movntdq
MOVNTDQ
non-temporal store of double quadword from an XMM register into memory
movnti
MOVNTI
non-temporal store of a doubleword from a general-purpose register into memory
movntiq valid only under –m64
movntpd
MOVNTPD
non-temporal store of two packed double-precision floating-point values from an XMM register into memory
pause
PAUSE
improves the performance of spin-wait loops