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Netra CP2300 cPSB Board Installation and Technical Reference Manual

816-7186-11



Contents

Figures

Tables

Preface

1. Overview of the Netra CP2300 cPSB Board

1.1 Features of the Netra CP2300 cPSB Board

1.2 Netra CP2300 Board System Configurations

1.2.1 PMC and PIM Modules

1.2.2 Rear Transition Card

1.3 Hot-Swap Support

1.4 System Requirements

1.4.1 Hardware Requirements

1.4.2 Software Requirements

1.5 Technical Support and Warranty

1.5.1 Board Part Number, Serial Number, and Revision Number Identification

2. Hardware Installation

2.1 Equipment and Operator Safety

2.2 Materials and Tools Required

2.3 Preparing for the Installation

2.3.1 Checking Power, Thermal, Environmental, and Space Requirements

2.3.2 Determining Local Network IP Addresses and Hostnames

2.3.3 Installation Procedure Summary

2.4 Configuring the Board Hardware

2.4.1 Installing SO-DIMM Memory Modules

2.4.2 Installing Optional PMC Devices

2.4.3 Setting Switches

2.4.4 Replacing the Serial EEPROM

2.4.5 Configuring Transition Card Hardware

2.5 Installing Boards Into the cPSB Chassis

2.5.1 Installing the Netra CP2300 Transition Card

2.5.2 Installing the Netra CP2300 Board

2.5.3 Installing an I/O Board

2.6 Setting Up an Assembled Netra CP2300 Board

2.7 Initial Power On and Firmware Upgrade

2.7.1 Powering on the System

2.7.2 Determining the Firmware Version

2.7.3 Upgrading the OpenBoot PROM Firmware

3. Software Configuration

3.1 Hot Swap Information

3.1.1 Hot-Swapping the Netra CP2300 Board

3.1.2 Retrieving Device Information

3.2 Setting the Time of Day

3.2.1 Setting the Time of Day In a Networked Configuration

3.2.2 Setting the Time of Day on a Standalone System

3.3 Downloading and Installing SunVTS

4. Firmware

4.1 Firmware Initialization

4.1.1 Firmware CORE and BPOST

4.1.2 CPOST and EPOST

4.1.3 EPOST

4.1.4 OpenBoot PROM

4.2 Firmware Configuration Variables

4.2.1 Firmware CORE Execution Control

4.2.2 OpenBoot PROM Configuration Variables

4.3 System Flash PROM Memory Map

4.4 USB Keyboard Support

4.5 ASM Support at OpenBoot PROM

4.5.1 CPU Thermal Sensor

4.6 SMC Firmware

4.6.1 SMC Configuration Block

4.7 Updating Flash PROMs

4.7.1 Exchanging the System and User Flash Memory Devices

4.7.2 Determining the Flash Memory Settings

4.7.3 Updating Flash Memory

4.7.4 SMC Firmware Update

4.8 Firmware Diagnostics

4.8.1 Setting Diagnostic Levels

4.8.2 Basic POST (BPOST)

4.8.3 Comprehensive POST (CPOST)

4.8.4 OpenBoot PROM On-Board Diagnostics

4.8.5 OpenBoot Diagnostics

5. Hardware and Functional Description

5.1 Summarized Physical Description

5.2 Detailed Description

5.3 CPU and Main Memory Subsystems

5.3.1 UltraSPARC IIi Processor

5.3.2 Memory Address Mapping

5.3.3 SDRAM Memory

5.3.4 Memory Components

5.4 Bus Subsystems

5.4.1 APB PCI Bus Interfaces

5.4.2 PMC and PIM Interface

5.4.3 I2C and IPMI Channels

5.5 System Input/Output

5.5.1 Front-Panel I/O

5.5.2 PMC Interface

5.5.3 Backplane I/O

5.6 System Management Controller

5.6.1 Watchdog Timer

5.7 Resets

5.8 Power Subsystem

5.8.1 Power Module

5.8.2 Early Power and IPMI Power

5.8.3 Transition Card Power Distribution

5.9 CompactPCI Interface

5.9.1 CompactPCI Interface Requirements

5.9.2 CompactPCI Signal Interface

5.10 Interrupts

5.11 Chip-Select PLD Registers

A. Specifications

A.1 System Compatibility Specifications

A.1.1 CompactPCI Specification Notes

A.2 CPU Specifications

A.3 Main Memory Specifications

A.4 Memory Configuration Specifications

A.5 PMC Interface Specifications

A.5.1 PMC Specification Notes

A.6 Power Requirements

A.7 Mechanical Specifications

A.8 Environmental Specifications

A.9 Thermal Validation

A.10 Reliability/Availability Specifications

A.11 Compliance Specifications

A.11.1 Agency Compliance

A.11.2 NEBS Level 3

B. Connectors, Pinouts and Switch Settings

B.1 PMC Connectors

B.1.1 PMC A Connector Interfaces

B.1.2 PMC B Connector Interfaces

B.2 Memory Connector

B.3 Front Panel Serial Connector

B.4 Backplane Connectors

B.4.1 CompactPCI J1/P1 (J9) Connector Pinout

B.4.2 CompactPCI J1/P1 (J9) Signal Descriptions

B.4.3 CompactPCI J2/P2 (J10) Connector Pinout

B.4.4 CompactPCI J2/P2 (J10) Signal Descriptions

B.4.5 CompactPCI J3/P3 (J13) Connector Pinout

B.4.6 CompactPCI J3/P3 (J13) Signal Descriptions

B.4.7 CompactPCI J5/P5 (J14) Connector Pinout

B.4.8 CompactPCI J5/P5 (J14) Signal Descriptions

B.5 DIP Switch Settings

B.5.1 SW3 DIP Switch

B.5.2 SW501, SW502, and SW503 DIP Switches

C. Solaris Sun FRU ID

C.1 prtfru Command

D. Bibliography

D.1 General References

D.1.1 Books and Specifications

D.2 Sun Microsystems Publications

D.2.1 Solaris Operating Environment

D.2.2 Alternate Pathing

D.2.3 SunVTS System Exerciser

D.2.4 Netra CP2300 Board Documents

Index Index-1