The general-purpose instructions perform basic data movement, memory addressing, arithmetic and logical operations, program flow control, input/output, and string operations on integer, pointer, and BCD data types.
The data transfer instructions move data between memory and the general-purpose and segment registers, and perform operations such as conditional moves, stack access, and data conversion.
Table 3–1 Data Transfer Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
BSWAP |
byte swap |
bswapq valid only under -xarch=amd64 |
|
CBW |
convert byte to word | ||
CDQ |
convert doubleword to quadword |
%eax -> %edx:%eax |
|
CDQE |
convert doubleword to quadword |
%eax -> %rax cltq valid only under -xarch=amd64 |
|
CMOVA |
conditional move if above |
cmovaq valid only under -xarch=amd64 |
|
CMOVAE |
conditional move if above or equal |
cmovaeq valid only under -xarch=amd64 |
|
CMOVB |
conditional move if below |
cmovbq valid only under -xarch=amd64 |
|
CMOVBE |
conditional move if below or equal |
cmovbeq valid only under -xarch=amd64 |
|
CMOVC |
conditional move if carry |
cmovcq valid only under -xarch=amd64 |
|
CMOVE |
conditional move if equal |
cmoveq valid only under -xarch=amd64 |
|
CMOVG |
conditional move if greater |
cmovgq valid only under -xarch=amd64 |
|
CMOVGE |
conditional move if greater or equal |
cmovgeq valid only under -xarch=amd64 |
|
CMOVL |
conditional move if less |
cmovlq valid only under -xarch=amd64 |
|
COMVLE |
conditional move if less or equal |
cmovleq valid only under -xarch=amd64 |
|
CMOVNA |
conditional move if not above |
cmovnaq valid only under -xarch=amd64 |
|
CMOVNAE |
conditional move if not above or equal |
cmovnaeq valid only under -xarch=amd64 |
|
CMOVNB |
conditional move if not below |
cmovnbq valid only under -xarch=amd64 |
|
CMOVNBE |
conditional move if not below or equal |
cmovnbeq valid only under -xarch=amd64 |
|
CMOVNC |
conditional move if not carry |
cmovncq valid only under -xarch=amd64 |
|
CMOVNE |
conditional move if not equal |
cmovneq valid only under -xarch=amd64 |
|
CMOVNG |
conditional move if greater |
cmovngq valid only under -xarch=amd64 |
|
CMOVNGE |
conditional move if not greater or equal |
cmovngeq valid only under -xarch=amd64 |
|
CMOVNL |
conditional move if not less |
cmovnlq valid only under -xarch=amd64 |
|
CMOVNLE |
conditional move if not above or equal |
cmovnleq valid only under -xarch=amd64 |
|
CMOVNO |
conditional move if not overflow |
cmovnoq valid only under -xarch=amd64 |
|
CMOVNP |
conditional move if not parity |
cmovnpq valid only under -xarch=amd64 |
|
CMOVNS |
conditional move if not sign (non-negative) |
cmovnsq valid only under -xarch=amd64 |
|
CMOVNZ |
conditional move if not zero |
cmovnzq valid only under -xarch=amd64 |
|
CMOVO |
conditional move if overflow |
cmovoq valid only under -xarch=amd64 |
|
CMOVP |
conditional move if parity |
cmovpq valid only under -xarch=amd64 |
|
CMOVPE |
conditional move if parity even |
cmovpeq valid only under -xarch=amd64 |
|
CMOVPO |
conditional move if parity odd |
cmovpoq valid only under -xarch=amd64 |
|
CMOVS |
conditional move if sign (negative) |
cmovsq valid only under -xarch=amd64 |
|
CMOVZ |
conditional move if zero |
cmovzq valid only under -xarch=amd64 |
|
CMPXCHG |
compare and exchange |
cmpxchgq valid only under -xarch=amd64 |
|
CMPXCHG8B |
compare and exchange 8 bytes | ||
CQO |
convert quadword to octword |
%rax -> %rdx:%rax cqtd valid only under -xarch=amd64 |
|
CQO |
convert quadword to octword |
%rax -> %rdx:%rax cqto valid only under -xarch=amd64 |
|
CWD |
convert word to doubleword |
%ax -> %dx:%ax |
|
CWDE |
convert word to doubleword in %eax register |
%ax -> %eax |
|
MOV |
move data between immediate values, general purpose registers, segment registers, and memory |
movq valid only under -xarch=amd64 |
|
MOVABS |
move immediate value to register |
movabs valid only under -xarch=amd64 |
|
MOVABS |
move immediate value to register {AL, AX, GAX, RAX} |
movabs valid only under -xarch=amd64 |
|
MOVSX |
move and sign extend |
movsbq and movswq valid only under -xarch=amd64 |
|
MOVZX |
move and zero extend |
movzbq and movzwq valid only under -xarch=amd64 |
|
POP |
pop stack |
popq valid only under -xarch=amd64 |
|
POPA |
pop general-purpose registers from stack |
popaw invalid under -xarch=amd64 |
|
POPAD |
pop general-purpose registers from stack |
invalid under -xarch=amd64 |
|
PUSH |
push onto stack |
pushq valid only under -xarch=amd64 |
|
PUSHA |
push general-purpose registers onto stack |
pushaw invalid under -xarch=amd64 |
|
PUSHAD |
push general-purpose registers onto stack |
invalid under -xarch=amd64 |
|
XADD |
exchange and add |
xaddq valid only under -xarch=amd64 |
|
XCHG |
exchange |
xchgq valid only under -xarch=amd64 |
|
XCHG |
exchange |
xchgqA valid only under -xarch=amd64 |
The binary arithmetic instructions perform basic integer computions on operands in memory or the general-purpose registers.
Table 3–2 Binary Arithmetic Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
ADC |
add with carry |
adcq valid only under -xarch=amd64 |
|
ADD |
integer add |
addq valid only under -xarch=amd64 |
|
CMP |
compare |
cmpq valid only under -xarch=amd64 |
|
DEC |
decrement |
decq valid only under -xarch=amd64 |
|
DIV |
divide (unsigned) |
divq valid only under -xarch=amd64 |
|
IDIV |
divide (signed) |
idivq valid only under -xarch=amd64 |
|
IMUL |
multiply (signed) |
imulq valid only under -xarch=amd64 |
|
INC |
increment |
incq valid only under -xarch=amd64 |
|
MUL |
multiply (unsigned) |
mulq valid only under -xarch=amd64 |
|
NEG |
negate |
negq valid only under -xarch=amd64 |
|
SBB |
subtract with borrow |
sbbq valid only under -xarch=amd64 |
|
SUB |
subtract |
subq valid only under -xarch=amd64 |
The decimal arithmetic instructions perform decimal arithmetic on binary coded decimal (BCD) data.
Table 3–3 Decimal Arithmetic Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
AAA |
ASCII adjust after addition |
invalid under -xarch=amd64 |
|
AAD |
ASCII adjust before division |
invalid under -xarch=amd64 |
|
AAM |
ASCII adjust after multiplication |
invalid under -xarch=amd64 |
|
AAS |
ASCII adjust after subtraction |
invalid under -xarch=amd64 |
|
DAA |
decimal adjust after addition |
invalid under -xarch=amd64 |
|
DAS |
decimal adjust after subtraction |
invalid under -xarch=amd64 |
The logical instructions perform basic logical operations on their operands.
Table 3–4 Logical Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
AND |
bitwise logical AND |
andq valid only under -xarch=amd64 |
|
NOT |
bitwise logical NOT |
notq valid only under -xarch=amd64 |
|
OR |
bitwise logical OR |
orq valid only under -xarch=amd64 |
|
XOR |
bitwise logical exclusive OR |
xorq valid only under -xarch=amd64 |
The shift and rotate instructions shift and rotate the bits in their operands.
Table 3–5 Shift and Rotate Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
RCL |
rotate through carry left |
rclq valid only under -xarch=amd64 |
|
RCR |
rotate through carry right |
rcrq valid only under -xarch=amd64 |
|
ROL |
rotate left |
rolq valid only under -xarch=amd64 |
|
ROR |
rotate right |
rorq valid only under -xarch=amd64 |
|
SAL |
shift arithmetic left |
salq valid only under -xarch=amd64 |
|
SAR |
shift arithmetic right |
sarq valid only under -xarch=amd64 |
|
SHL |
shift logical left |
shlq valid only under -xarch=amd64 |
|
SHLD |
shift left double |
shldq valid only under -xarch=amd64 |
|
SHR |
shift logical right |
shrq valid only under -xarch=amd64 |
|
SHRD |
shift right double |
shrdq valid only under -xarch=amd64 |
The bit instructions test and modify individual bits in operands. The byte instructions set the value of a byte operand to indicate the status of flags in the %eflags register.
Table 3–6 Bit and Byte Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
BSF |
bit scan forward |
bsfq valid only under -xarch=amd64 |
|
BSR |
bit scan reverse |
bsrq valid only under -xarch=amd64 |
|
BT |
bit test |
btq valid only under -xarch=amd64 |
|
BTC |
bit test and complement |
btcq valid only under -xarch=amd64 |
|
BTR |
bit test and reset |
btrq valid only under -xarch=amd64 |
|
BTS |
bit test and set |
btsq valid only under -xarch=amd64 |
|
SETA |
set byte if above | ||
SETAE |
set byte if above or equal | ||
SETB |
set byte if below | ||
SETBE |
set byte if below or equal | ||
SETC |
set byte if carry | ||
SETE |
set byte if equal | ||
SETG |
set byte if greater | ||
SETGE |
set byte if greater or equal | ||
SETL |
set byte if less | ||
SETLE |
set byte if less or equal | ||
SETNA |
set byte if not above | ||
SETNAE |
set byte if not above or equal | ||
SETNB |
set byte if not below | ||
SETNBE |
set byte if not below or equal | ||
SETNC |
set byte if not carry | ||
SETNE |
set byte if not equal | ||
SETNG |
set byte if not greater | ||
SETNGE |
set byte if not greater or equal | ||
SETNL |
set byte if not less | ||
SETNLE |
set byte if not less or equal | ||
SETNO |
set byte if not overflow | ||
SETNP |
set byte if not parity | ||
SETNS |
set byte if not sign (non-negative) | ||
SETNZ |
set byte if not zero | ||
SETO |
set byte if overflow | ||
SETP |
set byte if parity | ||
SETPE |
set byte if parity even | ||
SETPO |
set byte if parity odd | ||
SETS |
set byte if sign (negative) | ||
SETZ |
set byte if zero | ||
test{bwlq} |
logical compare |
testq valid only under -xarch=amd64 |
The control transfer instructions control the flow of program execution.
Table 3–7 Control Transfer Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
BOUND |
detect value out of range |
boundw invalid under -xarch=amd64 |
|
CALL |
call procedure | ||
ENTER |
high-level procedure entry | ||
INT |
software interrupt | ||
INTO |
interrupt on overflow |
invalid under -xarch=amd64 |
|
IRET |
return from interrupt | ||
JA |
jump if above | ||
JAE |
jump if above or equal | ||
JB |
jump if below | ||
JBE |
jump if below or equal | ||
JC |
jump if carry | ||
JCXZ |
jump register %cx zero | ||
JE |
jump if equal | ||
JECXZ |
jump register %ecx zero |
invalid under -xarch=amd64 |
|
JG |
jump if greater | ||
JGE |
jump if greater or equal | ||
JL |
jump if less | ||
JLE |
jump if less or equal | ||
JMP |
jump | ||
JNAE |
jump if not above or equal | ||
JNB |
jump if not below | ||
JNBE |
jump if not below or equal | ||
JNC |
jump if not carry | ||
JNE |
jump if not equal | ||
JNG |
jump if not greater | ||
JNGE |
jump if not greater or equal | ||
JNL |
jump if not less | ||
JNLE |
jump if not less or equal | ||
JNO |
jump if not overflow | ||
JNP |
jump if not parity | ||
JNS |
jump if not sign (non-negative) | ||
JNZ |
jump if not zero | ||
JO |
jump if overflow | ||
JP |
jump if parity | ||
JPE |
jump if parity even | ||
JPO |
jump if parity odd | ||
JS |
jump if sign (negative) | ||
JZ |
jump if zero |
|
|
CALL |
call far procedure |
valid as indirect only for -xarg=amd64 |
|
LEAVE |
high-level procedure exit | ||
LOOP |
loop with %ecx counter | ||
LOOPE |
loop with %ecx and equal | ||
LOOPNE |
loop with %ecx and not equal | ||
LOOPNZ |
loop with %ecx and not zero | ||
LOOPZ |
loop with %ecx and zero | ||
RET |
return from far procedure |
valid as indirect only for -xarg=amd64 |
|
RET |
return |
The string instructions operate on strings of bytes. Operations include storing strings in memory, loading strings from memory, comparing strings, and scanning strings for substrings.
The Solaris mnemonics for certain instructions differ slightly from the Intel/AMD mnemonics. Alphabetization of the table below is by the Solaris mnemonic. All string operations default to long (doubleword).
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
CMPS |
compare string |
cmpsq valid only under -xarch=amd64 |
|
CMPSB |
compare byte string | ||
CMPSD |
compare doubleword string | ||
CMPSW |
compare word string | ||
LODS |
load string |
lodsq valid only under -xarch=amd64 |
|
LODSB |
load byte string | ||
LODSD |
load doubleword string | ||
LODSW |
load word string | ||
MOVS |
move string |
movsq valid only under -xarch=amd64 |
|
MOVSB |
move byte string |
movsb is not movsb{wlq}. See Table 3–1 |
|
MOVSD |
move doubleword string | ||
MOVSW |
move word string |
movsw is not movsw{lq}. See Table 3–1 |
|
REP |
repeat while %ecx not zero | ||
REPNE |
repeat while not equal | ||
repnz |
REPNZ |
repeat while not zero | |
REPE |
repeat while equal | ||
repz |
REPZ |
repeat while zero | |
SCAS |
scan string |
scasq valid only under -xarch=amd64 |
|
SCASB |
scan byte string | ||
SCASD |
scan doubleword string | ||
SCASW |
scan word string | ||
STOS |
store string |
stosq valid only under -xarch=amd64 |
|
STOSB |
store byte string | ||
STOSD |
store doubleword string | ||
STOSW |
store word string |
The input/output instructions transfer data between the processor's I/O ports, registers, and memory.
Table 3–9 I/O Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
IN |
read from a port | ||
INS |
input string from a port | ||
INSB |
input byte string from port | ||
INSD |
input doubleword string from port | ||
INSW |
input word string from port | ||
OUT |
write to a port | ||
OUTS |
output string to port | ||
OUTSB |
output byte string to port | ||
OUTSD |
output doubleword string to port | ||
OUTSW |
output word string to port |
The status flag control instructions operate on the bits in the %eflags register.
Table 3–10 Flag Control Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
CLC |
clear carry flag | ||
CLD |
clear direction flag | ||
CLI |
clear interrupt flag | ||
CMC |
complement carry flag | ||
LAHF |
load flags into %ah register | ||
POPF |
pop %eflags from stack | ||
POPFL |
pop %eflags from stack |
popfq valid only under -xarch=amd64 |
|
PUSHF |
push %eflags onto stack | ||
PUSHFL |
push %eflags onto stack |
pushfq valid only under -xarch=amd64 |
|
SAHF |
store %ah register into flags | ||
STC |
set carry flag | ||
STD |
set direction flag | ||
STI |
set interrupt flag |
The segment register instructions load far pointers (segment addresses) into the segment registers.
Table 3–11 Segment Register Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
LDS |
load far pointer using %ds |
ldsl and ldsw invalid under -xarch=amd64 |
|
LES |
load far pointer using %es |
lesl and lesw invalid under -xarch=amd64 |
|
LFS |
load far pointer using %fs | ||
LGS |
load far pointer using %gs | ||
LSS |
load far pointer using %ss |
The instructions documented in this section provide a number of useful functions.
Table 3–12 Miscellaneous Instructions
Solaris Mnemonic |
Intel/AMD Mnemonic |
Description |
Notes |
---|---|---|---|
cpuid |
CPUID |
processor identification | |
lea{wlq} |
LEA |
load effective address |
leaq valid only under -xarch=amd64 |
nop |
NOP |
no operation | |
ud2 |
UD2 |
undefined instruction | |
xlat |
XLAT |
table lookup translation | |
xlatb |
XLATB |
table lookup translation |