C H A P T E R  8

BIOS Power-On Self-Test (POST) Codes

The system BIOS provides a basic power-on self-test (POST), during which the BIOS checks the basic devices required for the server to operate. The progress of the self-test is indicated by a series of POST codes. This chapter explains the BIOS POST testing, provides an alternate method for viewing the codes, describes how to change POST options, and lists the POST codes.

This chapter contains the following sections:


About POST

The POST is a systematic check of basic system devices. As the testing progresses, the BIOS displays codes that you can use to interpret the status of your server. The codes appear at the bottom right corner of the system’s VGA screen, after the self-test has progressed far enough to initialize the video monitor. Because the codes might scroll off of the screen too quickly to be read, an alternate method of displaying POST codes is to redirect the output of the console to a serial port (see Redirecting Console Output).

You can also see some of the post codes on LEDs inside the front panel of your server node (see POST Code LEDs).


How BIOS POST Memory Testing Works

The BIOS POST memory testing is performed as follows:

1. The first megabyte of DRAM is tested by the BIOS before the BIOS code is shadowed (that is, copied from ROM to DRAM).

2. Once executing out of DRAM, the BIOS performs a simple memory test (a write/read of every location with the pattern 55aa55aa).



Note - This memory test is performed only if Quick Boot is not enabled from the Boot Settings Configuration screen. Enabling Quick Boot causes the BIOS to skip the memory test. See Changing POST Options for more information.


3. The BIOS polls the memory controllers for both correctable and non-correctable memory errors and logs those errors into the SP.

4. The message BMC Responding appears at the end of POST.


Redirecting Console Output

You can access BIOS POST codes remotely using the web interface or the CLI.


procedure icon  To Access BIOS POST Codes Using the Web Interface

1. Open a browser and use the SP’s IP address as the URL.

Refer to the Sun Integrated Lights Out Manager 2.0 User’s Guide (820-1188) for information on how to obtain the IP address of the SP.

2. Type a user name and password as follows:

User name: root
Password: changeme

3. The ILOM SP web interface screen appears.

4. Click the Remote Control tab.

5. Click the Redirection tab.

6. Click the Start Redirection button.

The javaRConsole window appears and prompts you for your user name and password again, then the current POST screen appears.


procedure icon  To Access BIOS POST Codes Using the CLI

1. Log in to the SP cli with the command ssh root@<SP IP address> and use the command start /SP/console to start the serial console.


Changing POST Options

These instructions are optional, but you can use them to change the operations that the server performs during POST testing.


procedure icon  To Change the POST Options

1. Initialize the BIOS Setup Utility by pressing the F2 key while the system is performing the power-on self-test (POST).

The BIOS Main Menu screen appears.

2. Select the Boot menu.

The Boot Settings screen appears.

3. Select Boot Settings Configuration.

The Boot Settings Configuration screen appears.

4. On the Boot Settings Configuration screen, there are several options that you can enable or disable:


POST Codes

TABLE 8-1 contains descriptions of each of the POST codes, listed in the same order in which they are generated. These POST codes appear at the bottom right of the BIOS screen as a four-digit string that is a combination of two-digit output from primary I/O port 80 and two-digit output from secondary I/O port 81. In the POST codes listed in TABLE 8-1, the first two digits are from port 81 and the last two digits are from port 80.

You can see some of the POST codes from primary I/O port 80 on LEDs inside the front panel of your server node (see POST Code LEDs).

The Response column describes the action taken by the system on encountering the corresponding error. The actions are:


POST Code LEDs

Two LEDs inside the front cover of your server node display the same two-digit POST code output from primary I/O port 80 that is shown on the BIOS screen (the right-most two digits on the lower right of the BIOS screen are the POST code from primary I/O port 80).

In general, the POST codes change so rapidly that you cannot distinguish individual digits. Some POST tests take enough time (or pause or stop), however, so that they might be readable if you look at the LEDs through the front panel. Such codes are listed in TABLE 8-2.

 


TABLE 8-2 POST Codes on the Front Panel LEDs That Might Be Readable

Code

Meaning

4F

Initializing IPMI BT interface.

D4

Testing base memory; system might hang if test fails.

D5

Copying Boot Block to RAM and transferring control to RAM.

38

Initializing different devices through DIM (Device Initialization Manager). For example, USB controllers are initialized at this point.

75

Initializing Int-13 and preparing for IPL detection.

78

Initializing IPL devices controlled by BIOS and option ROMs.

85

Displaying errors to the user and getting the user response for error.

87

Executing BIOS setup if needed / requested. Checking boot password if installed.

00

Passing control to OS Loader (typically INT19h).

FF

The flash has been updated successfully. Making flash write disabled. Disabling ATAPI hardware. Restoring CPUID value back into register. Giving control to F000 ROM at F000:FFF0h.




Note - For each cold boot (such as when a blade is re-seated into the chassis), POST testing begins to run and detects system resources for a short while. After just a few POST codes, the node is turned off or restarted depending on the selected state in the BIOS for AC Power Loss (Always On, Always Off, or Last State).