Figures |
FIGURE 1-1 Teja 4.0 Overview Diagram
FIGURE 7-1 Eclipse-Based ADE GUI
FIGURE 7-2 Teja Project Settings
FIGURE 7-3 PacketClassifier Hardware Architecture - Inner Hardware
FIGURE 7-4 PacketClassifier Hardware Architecture - Outer Hardware
FIGURE 7-5 PacketClassifier Software Architecture - OS View
FIGURE 7-6 PacketClassifier Software Architecture - Late-Binding View
FIGURE 7-7 PacketClassifier Mapping
FIGURE 9-1 IPSec Gateway Reference Application Architecture
FIGURE 10-1 UltraSPARC T1 Architecture
FIGURE 10-2 UltraSPARC T2 Architecture
FIGURE 10-3 UltraSPARC T1 Forwarding Packet Rate Limited by I/O Throughput
FIGURE 10-4 Instructions per Packet Versus Frame Size
FIGURE 10-5 UltraSPARC T2 Forwarding Packet Rate
FIGURE 10-6 Example of Pipelining
FIGURE 10-7 Pipelining Effect on Throughput
FIGURE 10-8 Parallelizing Encryption Using Multiple Strands
FIGURE 10-9 RLP Application Setup
FIGURE 10-10 Results From Configuration 1
FIGURE 10-11 Results From Configuration 2
FIGURE B-1 Example for the ipfwd Application
FIGURE B-2 Memory Allocation Stack
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