Using the regs Command

The regs command enables you to print the value of all the registers.

The syntax for the regs command is:

regs [-f][-F]

-f includes floating-point registers (single precision). -F includes floating-point registers (double precision).

For more information, see regs Command.

SPARC based systems example:

dbx[13] regs -F
current thread: t@1
current frame:  [1]
g0-g3    0x00000000 0x0011d000 0x00000000 0x00000000
g4-g7    0x00000000 0x00000000 0x00000000 0x00020c38
o0-o3    0x00000003 0x00000014 0xef7562b4 0xeffff420
o4-o7    0xef752f80 0x00000003 0xeffff3d8 0x000109b8
l0-l3    0x00000014 0x0000000a 0x0000000a 0x00010a88
l4-l7    0xeffff438 0x00000001 0x00000007 0xef74df54
i0-i3    0x00000001 0xeffff4a4 0xeffff4ac 0x00020c00
i4-i7    0x00000001 0x00000000 0xeffff440 0x000108c4
y        0x00000000
psr      0x40400086
pc       0x000109c0:main+0x4    mov     0x5, %l0
npc      0x000109c4:main+0x8    st      %l0, [%fp - 0x8]
f0f1     +0.00000000000000e+00
f2f3     +0.00000000000000e+00
f4f5     +0.00000000000000e+00
f6f7     +0.00000000000000e+00
...

For x64 based systems example:

(dbx) regs
current frame:  [1]
r15     0x0000000000000000
r14     0x0000000000000000
r13     0x0000000000000000
r12     0x0000000000000000
r11     0x0000000000401b58
r10     0x0000000000000000
r9      0x0000000000401c30
r8      0x0000000000416cf0
rdi     0x0000000000416cf0
rsi     0x0000000000401c18
rbp     0xfffffd7fffdff820
rbx     0xfffffd7fff3fb190
rdx     0x0000000000401b50
rcx     0x0000000000401b54
rax     0x0000000000416cf0
trapno  0x0000000000000003
err     0x0000000000000000
rip     0x0000000000401709:main+0xf9    movl $0x0000000000000000,0xfffffffffffffffc(%rbp)
cs      0x000000000000004b
eflags  0x0000000000000206
rsp     0xfffffd7fffdff7b0
ss      0x0000000000000043
fs      0x00000000000001bb
gs      0x0000000000000000
es      0x0000000000000000
ds      0x0000000000000000
fs_base  0xfffffd7fff3a2000
gsbase  0xffffffff80000000
(dbx) regs -F
current frame:  [1]
r15     0x0000000000000000
r14     0x0000000000000000
r13     0x0000000000000000
r12     0x0000000000000000
r11     0x0000000000401b58
r10     0x0000000000000000
r9      0x0000000000401c30
r8      0x0000000000416cf0
rdi     0x0000000000416cf0
rsi     0x0000000000401c18
rbp     0xfffffd7fffdff820
rbx     0xfffffd7fff3fb190
rdx     0x0000000000401b50
rcx     0x0000000000401b54
rax     0x0000000000416cf0
trapno  0x0000000000000003
err     0x0000000000000000
rip     0x0000000000401709:main+0xf9    movl     $0x0000000000000000,0xfffffffffffffffc(%rbp)
cs      0x000000000000004b
eflags  0x0000000000000206
rsp     0xfffffd7fffdff7b0
ss      0x0000000000000043
fs      0x00000000000001bb
gs      0x0000000000000000
es      0x0000000000000000
ds      0x0000000000000000
fs_base  0xfffffd7fff3a2000
gsbase  0xffffffff80000000
st0     +0.00000000000000000000e+00
st1     +0.00000000000000000000e+00
st2     +0.00000000000000000000e+00
st3     +0.00000000000000000000e+00
st4     +0.00000000000000000000e+00
st5     +0.00000000000000000000e+00
st6     +0.00000000000000000000e+00
st7     +NaN
xmm0a-xmm0d     0x00000000 0xfff80000 0x00000000 0x00000000
xmm1a-xmm1d     0x00000000 0x00000000 0x00000000 0x00000000
xmm2a-xmm2d     0x00000000 0x00000000 0x00000000 0x00000000
xmm3a-xmm3d     0x00000000 0x00000000 0x00000000 0x00000000
xmm4a-xmm4d     0x00000000 0x00000000 0x00000000 0x00000000
xmm5a-xmm5d     0x00000000 0x00000000 0x00000000 0x00000000
xmm6a-xmm6d     0x00000000 0x00000000 0x00000000 0x00000000
xmm7a-xmm7d     0x00000000 0x00000000 0x00000000 0x00000000
xmm8a-xmm8d     0x00000000 0x00000000 0x00000000 0x00000000
xmm9a-xmm9d     0x00000000 0x00000000 0x00000000 0x00000000
xmm10a-xmm10d   0x00000000 0x00000000 0x00000000 0x00000000
xmm11a-xmm11d   0x00000000 0x00000000 0x00000000 0x00000000
xmm12a-xmm12d   0x00000000 0x00000000 0x00000000 0x00000000
xmm13a-xmm13d   0x00000000 0x00000000 0x00000000 0x00000000
xmm14a-xmm14d   0x00000000 0x00000000 0x00000000 0x00000000
xmm15a-xmm15d   0x00000000 0x00000000 0x00000000 0x00000000
fcw-fsw  0x137f 0x0000
fctw-fop        0x0000 0x0000
frip     0x0000000000000000
frdp     0x0000000000000000
mxcsr    0x00001f80
mxcr_mask       0x0000ffff
(dbx)

Platform-Specific Registers

The tables in this section list platform-specific register names for SPARC architecture, x86 architecture, and AMD64 architecture that can be used in expressions.

SPARC Register Information

The following table lists register information for SPARC architecture.

Register Description $g0 through $g7 Global registers $o0 through $o7 “out” registers $l0 through $l7 “local” registers $i0 through $i7 “in” registers $fp Frame pointer, equivalent to register $i6 $sp Stack pointer, equivalent to register $o6 $y Y register $psr Processor state register $wim Window invalid mask register $tbr Trap base register $pc Program counter $npc Next program counter $f0 through $f31 FPU “f” registers $fsr FPU status register $fq FPU queue

The $f0f1 $f2f3 ... $f30f31 pairs of floating-point registers are treated as having C double type (normally $fN registers are treated as C float type). These pairs can also be referred to as $d0 ... $d30.

The following quad floating-point registers are treated as having C long double type, They are available on SPARC V9 hardware:

$q0 $q4 through $q60

The following pairs of registers, which combine the least significant 32 bits of two registers, are available on SPARC V8+ hardware:

$g0g1 through $g6g7
$o0o1 through $o6o7

The following additional registers are available on SPARC V9 and V8+ hardware:

$xg0 through $xg7
$xo0 through $xo7
$xfsr $tstate $gsr
$f32f33 $f34f35 through $f62f63 ($d32 ... $$d62)

See SPARC Architecture Reference Manual and the SPARC Assembly Language Reference Manual for more information on SPARC registers and addressing.

x86 Register Information

The following table lists register information for x86 architecture.

Register Description $gs Alternate data segment register $fs Alternate data segment register $es Alternate data segment register $ds Data segment register $edi Destination index register $esi Source index register $ebp Frame pointer $esp Stack pointer $ebx General register $edx General register $ecx General register $eax General register $trapno Exception vector number $err Error code for exception $eip Instruction pointer $cs Code segment register $eflags Flags $ss Stack segment register

Commonly used registers are also aliased to their machine independent names.

Register Description $sp Stack pointer; equivalent of $uesp $pc Program counter; equivalent of $eip $fp Frame pointer; equivalent of $ebp $ps Processor status register

The following table lists registers for the 80386 lower halves (16 bits).

Register Description $ax General register $cx General register $dx General register $bx General register $si Source index register $di Destination index register $ip Instruction pointer, lower 16 bits $flags Flags, lower 16 bits

The first four 80386 16-bit registers can be split into 8-bit parts, as shown in the following table:

Register Description $al Lower (right) half of register $ax $ah Higher (left) half of register $ax $cl Lower (right) half of register $cx $ch Higher (left) half of register $cx $dl Lower (right) half of register $dx $dh Higher (left) half of register $dx $bl Lower (right) half of register $bx $bh Higher (left) half of register $bx

The following table lists registers for 80387 halves:.

Register Description $fctrl Control register $fstat Status register $ftag Tag register $fip Instruction pointer offset $fcs Code segment selector $fopoff Operand pointer offset $fopsel Operand pointer selector $st0 through $st7 Data registers

AMD64 Register Information

The following table lists r egister information for AMD64 architecture:

Register Description rax General purpose register - argument passing for function calls rbp General purpose register - stack management/frame pointer rbx General purpose register - callee-saved rcx General purpose register - argument passing for function calls rdx General purpose register - argument passing for function calls rsi General purpose register - argument passing for function calls rdi General purpose register - argument passing for function calls rsp General purpose register - stack management/stack pointer r8 General purpose register - argument passing for function calls r9 General purpose register - argument passing for function calls r10 General purpose register - temporary r11 General purpose register - temporary r12 General purpose register - callee-saved r13 General purpose register - callee-saved r14 General purpose register - callee-saved r15 General purpose register - callee-saved rflags Flags register rip Instruction pointer mmx0/st0 64-bit media and floating-point register mmx1/st1 64-bit media and floating-point register mmx2/st2 64-bit media and floating-point register mmx3/st3 64-bit media and floating-point register mmx4/st4 64-bit media and floating-point register mmx5/st5 64-bit media and floating-point register mmx6/st6 64-bit media and floating-point register mmx7/st7 64-bit media and floating-point register xmm0 128-bit media register xmm1 128-bit media register xmm2 128-bit media register xmm3 128-bit media register xmm4 128-bit media register xmm5 128-bit media register xmm6 128-bit media register xmm7 128-bit media register xmm8 128-bit media register xmm9 128-bit media register xmm10 128-bit media register xmm11 128-bit media register xmm12 128-bit media register xmm13 128-bit media register xmm14 128-bit media register xmm15 128-bit media register cs Segment register es Segment register fs Segment register gs Segment register os Segment register ss Segment register fcw fxsave and fxstor memory image control word fsw fxsave and fxstor memory image status word fctw fxsave and fxstor memory image tag word fop fxsave and fxstor memory image last x87 op code frdp fxsave and fxstor memory image 64-bit offset into the date segment frip fxsave and fxstor memory image 64-bit offset into the code segment mxcsr_mask set bits in mxcsr_mask indicate supported feature bits in mxcsr ymmo 256–bit advanced vector register ymm1 256–bit advanced vector register ymm2 256–bit advanced vector register ymm3 256–bit advanced vector register ymm4 256–bit advanced vector register ymm5 256–bit advanced vector register ymm6 256–bit advanced vector register ymm7 256–bit advanced vector register ymm8 256–bit advanced vector register ymm9 256–bit advanced vector register ymm10 256–bit advanced vector register ymm11 256–bit advanced vector register ymm12 256–bit advanced vector register ymm13 256–bit advanced vector register ymm14 256–bit advanced vector register ymm15 256–bit advanced vector register

The fields of an advanced vector (AVX) register (ymm0 through ymm15) can be treated as having C int, float, or double types.