Chipset
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* Advanced PCIPnP Boot Security RC Settings Chipset Exit **
* **
* Advanced Chipset Settings * Configure CPU Bridge **
* *************************************************** * features. **
* WARNING: Setting wrong values in below sections * **
* may cause system to malfunction. * **
* * **
* * CPU Bridge Configuration * **
* * North Bridge Configuration * **
* * South Bridge Configuration * **
* * **
* * **
* * **
* * **
* * * Select Screen **
* * ** Select Item **
* * Enter Go to Sub Screen **
* * F1 General Help **
* *(CTRL+Q from remote kbd)**
* * F10 Save and Exit **
* *(CTRL+S from remote kbd)**
* * ESC Exit **
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* Chipset **
* **
* CPU Bridge Chipset Configuration * Spread spectrum **
* *************************************************** * modulation. **
* * **
* * **
* Spread Spectrum Mode [Enabled] * **
* * **
* * **
* * **
* * **
* * **
* * **
* * **
* * * Select Screen **
* * ** Select Item **
* * +- Change Option **
* * F1 General Help **
* *(CTRL+Q from remote kbd)**
* * F10 Save and Exit **
* *(CTRL+S from remote kbd)**
* * ESC Exit **
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* NorthBridge Chipset Configuration * Configure Option ROM **
* *************************************************** * **
* * **
* * **
* * Option ROM Scan for PCIe devices * **
* * I/O Allocation for PCIe devices * **
* * Resource Rebalancing features * **
* * **
* MMIOL Reclaim [Enabled] * **
* PCI MMIO 64 Bits Support [Disabled] * **
* * **
* * **
* * * Select Screen **
* * ** Select Item **
* * Enter Go to Sub Screen **
* * F1 General Help **
* *(CTRL+Q from remote kbd)**
* * F10 Save and Exit **
* *(CTRL+S from remote kbd)**
* * ESC Exit **
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* Chipset **
* **
* Option ROM Scan for PCIe devices ** Enable/Disable loading **
* ***************************************************** of the Option ROM for **
* ** PCIe NIC3.0 **
* Scanning OPROM on BL3 NIC0 [Enabled] ** **
* Scanning OPROM on BL3 NIC1 [Enabled] ** **
* Scanning OPROM on BL3 FEM0 [Disabled] ** **
* Scanning OPROM on BL3 FEM1 [Disabled] ** **
* Scanning OPROM on BL3 EM0 [Disabled] ** **
* Scanning OPROM on BL3 EM1 [Disabled] ** **
* ** **
* Scanning OPROM on BL2 NIC0 [Enabled] ** **
* Scanning OPROM on BL2 NIC1 [Enabled] ** **
* Scanning OPROM on BL2 FEM0 [Disabled] ** * Select Screen **
* Scanning OPROM on BL2 FEM1 [Disabled] ** ** Select Item **
* Scanning OPROM on BL2 EM0 [Disabled] ** +- Change Option **
* Scanning OPROM on BL2 EM1 [Disabled] ** F1 General Help **
* **(CTRL+Q from remote kbd)**
* Scanning OPROM on BL1 NIC0 [Enabled] ** F10 Save and Exit **
* Scanning OPROM on BL1 NIC1 [Enabled] **(CTRL+S from remote kbd)**
* Scanning OPROM on BL1 FEM0 [Disabled] ** ESC Exit **
* Scanning OPROM on BL1 FEM1 [Disabled] ** **
* Scanning OPROM on BL1 EM0 [Disabled] ** **
* Scanning OPROM on BL1 EM1 [Disabled] ** **
* ** **
* Scanning OPROM on BL0 REM [Enabled] ** * Select Screen **
* Scanning OPROM on BL0 NIC0 [Enabled] ** ** Select Item **
* Scanning OPROM on BL0 NIC1 [Enabled] ** +- Change Option **
* Scanning OPROM on BL0 FEM0 [Disabled] ** F1 General Help **
* Scanning OPROM on BL0 FEM1 [Disabled] **(CTRL+Q from remote kbd)**
* Scanning OPROM on BL0 EM0 [Disabled] ** F10 Save and Exit **
* Scanning OPROM on BL0 EM1 [Disabled] **(CTRL+S from remote kbd)**
* ** ESC Exit **
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* Chipset **
* **
* I/O Allocation for PCIe devices ** This can prevent I/O **
* ***************************************************** resources from **
* ** being assigned **
* I/O Allocation for BL3 NIC [Enabled] ** to NIC3.0 & NIC3.1 **
* I/O Allocation for BL3 REM [Enabled] ** **
* I/O Allocation for BL3 EM0 [Enabled] ** **
* I/O Allocation for BL3 EM1 [Enabled] ** **
* I/O Allocation for BL3 FEM0 [Enabled] ** **
* I/O Allocation for BL3 FEM1 [Enabled] ** **
* ** **
* I/O Allocation for BL2 NIC [Enabled] ** **
* I/O Allocation for BL2 REM [Enabled] ** **
* I/O Allocation for BL2 EM0 [Enabled] ** **
* I/O Allocation for BL2 EM1 [Enabled] ** **
* I/O Allocation for BL2 FEM0 [Enabled] ** **
* I/O Allocation for BL2 FEM1 [Enabled] ** **
* ** **
* I/O Allocation for BL1 NIC [Enabled] ** **
* I/O Allocation for BL1 REM [Enabled] ** **
* I/O Allocation for BL1 EM0 [Enabled] ** **
* I/O Allocation for BL1 EM1 [Enabled] ** **
* I/O Allocation for BL1 FEM0 [Enabled] ** **
* I/O Allocation for BL1 FEM1 [Enabled] ** **
* ** * Select Screen **
* I/O Allocation for BL0 NIC [Enabled] ** ** Select Item **
* I/O Allocation for BL0 REM [Enabled] ** +- Change Option **
* I/O Allocation for BL0 EM0 [Enabled] ** F1 General Help **
* I/O Allocation for BL0 EM1 [Enabled] **(CTRL+Q from remote kbd)**
* I/O Allocation for BL0 FEM0 [Enabled] ** F10 Save and Exit **
* I/O Allocation for BL0 FEM1 [Enabled] **(CTRL+S from remote kbd)**
* ** ESC Exit **
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* Chipset **
* **
* Resource Rebalancing features * Total IO Ratio value **
* *************************************************** * in all Processor **
* * Modules should add up **
* * to 8. IO Ratio value 0 **
* BL3 IO RATIO [Auto] * is not supported. The **
* BL2 IO RATIO [Auto] * granularity is 8Kb. **
* BL1 IO RATIO [Auto] * **
* BL0 IO RATIO [Auto] * **
* * **
* BL3 MMIO RATIO [Auto] * **
* BL2 MMIO RATIO [Auto] * **
* BL1 MMIO RATIO [Auto] * **
* BL0 MMIO RATIO [Auto] * * Select Screen **
* * ** Select Item **
* * +- Change Option **
* * F1 General Help **
* *(CTRL+Q from remote kbd)**
* * F10 Save and Exit **
* *(CTRL+S from remote kbd)**
* * ESC Exit **
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* Chipset **
* **
* South Bridge Chipset Configuration * Options **
* *************************************************** * **
* SMBUS Controller [Enabled] * Enabled **
* * Disabled **
* Restore on AC Power Loss [Last State] * **
* SATA Master Break Event [Disabled] * **
* * **
* * **
* * **
* * **
* * **
* * **
* * * Select Screen **
* * ** Select Item **
* * +- Change Option **
* * F1 General Help **
* *(CTRL+Q from remote kbd)**
* * F10 Save and Exit **
* *(CTRL+S from remote kbd)**
* * ESC Exit **
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