SPARC Instruction Sets and Mnemonics

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This appendix provides information about the SPARC instruction sets, operation codes, and mnemonics accepted by the assembler.

The full SPARC instruction set is detailed in the Oracle SPARC Architecture 2011 Guide, referred to in this appendix as OSA.

C.1 Natural Instructions

Some of the synthetic SPARC instructions were extended to include the natural operations, which are interpreted differently for -m32 or -m64 assembly.

Table C-1 Natural Instructions

Natural Instruction	`—m32` Interpretation	`—m64` Interpretation
`ldn`	`ld`	`ldx`
`stn`	`st`	`stx`
`ldna`	`lda`	`ldax`
`stna`	`sta`	`stxa`
`casn`	`cas`	`casx`
`slln`	`sll`	`sllx`
`srln`	`srl`	`srlx`
`sran`	`sra`	`srax`
`clrn`	`clr`	`clrx`
`setn`	`set`	`setx`
`setnhi`	`sethi`	`setxhi`

C.1.1 Natural Register, Natural Word

In addition to natural instructions, there is also the natural register %ncc and the natural word pseudo-op .nword, which are interpreted differently depending on the assembly mode.

Table C-2 Natural Register and Word

Register and Word	`—m32` Interpretation	`—m64` Interpretation
`%ncc` register	`%icc`	`%xcc`
`.nword` pseudo-op	`.word`	`.xword`