E.4 SPARC-V9 Floating-Point Instruction Set Mapping - SPARC Assembly Language Reference Manual

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	SPARC Assembly Language Reference Manual

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Document Information

1. SPARC Assembler for SunOS 5.x

2. Assembler Syntax

3. Executable and Linking Format

4. Converting Files to the New Format

5. Instruction-Set Mapping

A. Pseudo-Operations

B. Examples of Pseudo-Operations

C. Using the Assembler Command Line

D. An Example Language Program

E. SPARC-V9 Instruction Set

E.1 SPARC-V9 Changes

E.1.1 Registers

E.1.2 Alternate Space Access

E.1.3 Byte Order

E.2 SPARC-V9 Instruction Set Changes

E.2.1 Extended Instruction Definitions to Support the 64-bit Model

E.2.2 Added Instructions to Support 64 bits

E.2.3 Added Instructions to Support High-Performance System Implementation

E.2.4 Deleted Instructions

E.2.5 Miscellaneous Instruction Changes

E.3 SPARC-V9 Instruction Set Mapping

E.4 SPARC-V9 Floating-Point Instruction Set Mapping

E.5 SPARC-V9 Synthetic Instruction-Set Mapping

E.6 UltraSPARC and VIS Instruction Set Extensions

E.6.1 Graphics Data Formats

E.6.2 Eight-bit Format

E.6.3 Fixed Data Formats

E.6.4 SHUTDOWN Instruction

E.6.5 Graphics Status Register (GSR)

E.6.6 Graphics Instructions

E.6.7 Memory Access Instructions

E.4 SPARC-V9 Floating-Point Instruction Set Mapping

SPARC-V9 floating-point instructions are shown in the following table.

Table E-11

SPARC	Mnemonic¹	Argument List	Description
`F[sdq]TOx`	`fstox` `fdtox` `fqtox`	`freg`_rs2, `freg`_rd `freg`_rs2, `freg`_rd `freg`_rs2, `freg`_rd	Convert floating point to 64-bit integer
	`fstoi` `fdtoi` `fqtoi`	`freg`_rs2, `freg`_rd `freg`_rs2, `freg`_rd `freg`_rs2, `freg`_rd	Convert floating-point to 32-bit integer
`FxTO[sdq]`	`fxtos` `fxtod` `fxtoq`	freg_rs2, freg_rd freg_rs2, freg_rd freg_rs2, freg_rd	Convert 64-bit integer to floating point
	`fitos` `fitod` `fitoq`	freg_rs2, freg_rd freg_rs2, freg_rd freg_rs2, freg_rd	Convert 32-bit integer to floating point
`FMOV[dq]`	`fmovd` `fmovq`	freg_rs2, freg_rd freg_rs2, freg_rd	Move double Move quad
`FNEG[dq]`	`fnegd` `fnegq`	freg_rs2, freg_rd freg_rs2, freg_rd	Negate double Negate quad
`FABS[dq]`	`fabsd` `fabsq`	freg_rs2, freg_rd freg_rs2, freg_rd	Absolute value double Absolute value quad
`LDFA` `LDDFA` `LDQFA`	`lda` `lda` `ldda` `ldda` `ldqa` `ldqa`	[regaddr] imm_asi, freg_rd [reg_plus_imm] %asi, freg_rd [regaddr] imm_asi, freg_rd [reg_plus_imm] %asi, freg_rd [regaddr] imm_asi, freg_rd [reg_plus_imm] %asi, freg_rd	Load floating-point register from alternate space Load double floating-point register from alternate space. Load quad floating-point register from alternate space
`STFA` `STDFA` `STQFA`	`sta` `sta` `stda` `stda` `stqa` `stqa`	freg_rd, [regaddr] imm_asi freg_rd, [reg_plus_imm] %asi freg_rd, [regaddr] imm_asi freg_rd, [reg_plus_imm] %asi freg_rd, [regaddr] imm_asi freg_rd, [reg_plus_imm] %asi	Store floating-point register to alternate space Store double floating-point register to alternate space Store quad floating-point register to alternate space

¹ Types of Operands are denoted by the following lower-case letters:i 32-bit integerx 64-bit integers singled doubleq quad

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