SPARC Assembly Language Reference Manual

5.5 Synthetic Instructions

Table 5–6 describes the mapping of synthetic instructions to hardware instructions.

Table 5–6

Synthetic Instruction 

Hardware Equivalent(s) 

Comment 

btst

reg_or_imm, regrs1

andcc

regrs1, reg_or_imm, %g0

Bit test 

bset

reg_or_imm, regrd

or

regrd, reg_or_imm, regrd

Bit set 

bclr

reg_or_imm, regrd

andn

regrd, reg_or_imm, regrd

Bit clear 

btog

reg_or_imm, regrd

xor

regrd, reg_or_imm, regrd

Bit toggle 

call

reg_or_imm

jmpl

reg_or_imm, %o7

 

clr

regrd

or

%g0, %g0, regrd

Clear (zero) register 

clrb

[address]

stb

%g0, [address]

Clear byte 

clrh

[address]

st

%g0, [address]

Clear halfword 

clr

[address]

st

%g0, [address]

Clear word 

cmp

reg, reg_or_imm

subcc

regrs1, reg_or_imm, %g0

Compare 

dec

regrd

sub

regrd, 1, regrd

Decrement by 1 

dec

const13, regrd

sub

regrd, const13, regrd

Decrement by const13

deccc

regrd

subcc

regrd, 1, regrd

Decrement by 1 and set icc

deccc

const13, regrd

subcc

regrd, const13, regrd

Decrement by const13 and set icc

inc

regrd

add

regrd, 1, regrd

Increment by 1 

inc

const13, regrd

add

regrd, const13, regrd

Increment by const13

inccc

regrd

addcc

regrd, 1, regrd

Increment by 1 and set icc

inccc

const13, regrd

addcc

regrd, const13, regrd

Increment by const13 and set icc

jmp

address

jmpl

address, %g0

 

mov

mov

mov

mov

mov

mov

mov

mov

mov

reg_or_imm,regrd

%y, regrs1

%psr, regrs1

%wim, regrs1

%tbr, regrs1

reg_or_imm, %y

reg_or_imm, %psr

reg_or_imm, %wim

reg_or_imm, %tbr

or

rd

rd

rd

rd

wr

wr

wr

wr

%g0, reg_or_imm, regrd

%y, regrs1

%psr, regrs1

%wim, regrs1

%tbr, regrs1

%g0,reg_or_imm,%y

%g0,reg_or_imm,%psr

%g0,reg_or_imm,%wim

%g0,reg_or_imm,%tbr

 

not

regrs1, regrd

xnor

regrs1, %g0, regrd

One's complement 

not

regrd

xnor

regrd, %g0, regrd

One's complement 

neg

regrs1, regrd

sub

%g0, regrs2, regrd

Two's complement 

neg

regrd

sub

%g0, regrd, regrd

Two's complement 

restore

 

restore

%g0, %g0, %g0

Trivial restore

save

 

save

%g0, %g0, %g0

Trivial save

trivial save should only be used in supervisor code!

set

value,regrd

or

%g0, value, regrd

if -4096 ≤value ≤ 4095

Do not use the set synthetic instruction in an instruction delay slot.

set

value,regrd

sethi

%hi(value), regrd

if ((value & 0x3ff) == 0)

set

value, regrd

sethi

or

%hi(value), regrd; regrd, %lo(value), regrd

otherwise 

Do not use the set synthetic instruction in an instruction delay slot.

skipz

 

bnz,a .+8

 

if z is set, ignores next instruction

skipnz

 

bz,a .+8

 

if z is not set, ignores next instruction

tst

reg

orcc

regrs1, %g0, %g0

test