Specifications for the Sun Netra CP3220 blade server are provided in the following sections:
A.1 Form Factor
The Sun Netra CP3220 blade server is a standard 8-rack unit (8U) factor, single-slot wide. It complies with the board mechanical dimensions that are required by the PICMG 3.0 R1.0 specification:
- 322.25 mm x 280 mm (12.7 inches x 11.0 inches)
- 30.48 mm ( 1.2 inch) front panel
A.2 Power and Thermal Metrics
The heatsink was designed specifically for the Sun Netra CP3220 blade server and is mechanically mounted to the blade server. The heatsink and DIMMs are positioned on the blade server to provide adequate airflow (bottom to top).
A.2.1 Processor Metrics
Typical heat dissipation and power consumption metrics for a Sun Netra CP3220 blade server equipped with an AMD Opteron processor are as follows.
- Dual-Core CPU:
- 115 W typical, 140 W maximum for CPU only
- 205 W maximum power (includes 25 W to ARTM and 20 W per AMC slot)
- -5C - 55C for NEBS compliance
- Power input: -36 VDC to -72 VDC (-48 VDC nominal)
- Quad-Core CPU:
- 125 W typical, 150 W maximum for CPU only
- 215 W maximum power (includes 25 W to ARTM and 20 W per AMC slot)
- -5C - 55C for NEBS compliance
- Power input: -36 VDC to -72 VDC (-48 VDC nominal)
A.2.2 PICMG Board Cooling Requirements
TABLE A-1 provides the blade server board cooling requirements. No alarms are triggered at any of the listed temperatures for the given airflow.
TABLE A-1 Airflow Requirements
|
Watts
|
m3/min
|
CFM
|
|
Power Level
|
25˚C
|
28˚C
|
40˚C
|
55˚C
|
25˚C
|
28˚C
|
40˚C
|
55˚C
|
|
140
|
0.045
|
0.045
|
0.91
|
0.91
|
16
|
16
|
32
|
32
|
|
205
|
0.045
|
0.045
|
0.91
|
0.91
|
16
|
16
|
32
|
32
|
|
210
|
0.045
|
0.045
|
0.91
|
0.91
|
16
|
16
|
32
|
32
|
A.2.3 PICMG ARTM Cooling Requirements
TABLE A-2 provides the Pressure Drop vs. Flow Rate for the ARTM.
TABLE A-2 ARTM Pressure Drop
|
Volumetric
Flow Rate
(CFM)
|
Volumetric
Flow Rate
(m3/min)
|
Pressure Drop
2 DIMMs (Pa)
|
Pressure Drop
2 DIMMs
(inches of H2O)
|
Pressure Drop
8 DIMMs (Pa)
|
Pressure Drop
8 DIMMs
(inches of H2O)
|
|
0
|
0
|
0
|
0
|
0
|
0
|
|
17
|
0.48
|
11.16
|
0.05
|
11.16
|
0.05
|
|
24
|
0.68
|
18.61
|
0.08
|
18.61
|
0.08
|
|
30
|
0.85
|
28.53
|
0.12
|
31.01
|
0.13
|
|
34
|
0.96
|
34.73
|
0.14
|
38.45
|
0.16
|
|
42
|
1.19
|
48.38
|
0.2
|
54.58
|
0.22
|
|
45
|
1.27
|
59.05
|
0.24
|
64.5
|
0.26
|
|
48
|
1.36
|
64.5
|
0.26
|
71.95
|
0.29
|
|
51
|
1.44
|
71.95
|
0.29
|
79.39
|
0.32
|
|
54
|
1.53
|
79.39
|
0.32
|
86.83
|
0.35
|
A.3 Connectors and PinoutsA.3.1 Front Panel Connectors
The front panel has the following connectors, see FIGURE 1-1:
- One 10/100/1000BASE-T Ethernet port (RJ-45)
- One serial port (RJ-45)
- Two USB ports
A.3.1.1 Ethernet Port
The Ethernet connector is an RJ-45 connector. The controller autonegotiates to either 10 BASE-T, 100 BASE-T, or 1000 BASE-T.
FIGURE A-1 shows the Ethernet port connector.
FIGURE A-1 Ethernet RJ-45 Connector
TABLE A-3 provides the eight pin assignments for the Ethernet port connector.
TABLE A-3 Ethernet Port Connector Pin Assignments
|
Pin
|
Signal Name
|
Pin
|
Signal Name
|
|
1
|
DA+
|
5
|
DC-
|
|
2
|
DA-
|
6
|
DB-
|
|
3
|
DB+
|
7
|
DD+
|
|
4
|
DC+
|
8
|
DD-
|
A.3.1.2 USB Ports
FIGURE A-2 shows the connector pin assignments for both of the front panel USB ports.
FIGURE A-2 Front Panel USB Connector
TABLE A-5 lists the USB port connector pin assignments.
TABLE A-4 USB Port Pin Assignments
|
Pin
|
Signal Name
|
Description
|
|
1
|
VCC
|
+5 VDA (500ma)
|
|
2
|
D-
|
Data-
|
|
3
|
D+
|
Data+
|
|
4
|
GND
|
Ground
|
A.3.1.3 Serial Port
FIGURE A-3 shows the connector pin assignments for the front panel serial port. TABLE A-5 lists the serial port connector pin assignments.
FIGURE A-3 Front Panel Serial RJ-45 Connector
TABLE A-5 Serial Port Mini DIN 8-pin Connector Pinouts
|
Pin
|
Signal Name
|
Pin
|
Signal Name
|
|
1
|
RTS
|
5
|
GND
|
|
2
|
DTR
|
6
|
RXD
|
|
3
|
TXD
|
7
|
DSR
|
|
4
|
GND
|
8
|
CTS
|
A.3.2 AMC Connectors
Two 170-pin connectors make up the AMC card connections. These connectors and pinouts are defined by the following industry-standard specification: PICMG Advanced Mezzanine Cards AMC.0 Specification R1.0 ECR-002 D0.9, June 29, 2006
The AMC slots are available at the front panel. The AMC cards can be accessed from the front panel, depending on the features of the AMC card, or through an optional ARTM.
A.3.3 Power Connector (Zone 1)
The Sun Netra CP3220 blade server uses a 34-pin Positronic connector as the Zone 1 power distribution connector. It provides the support for the following signals:
- Two -48 VDC power feeds (four signals each; eight signals total)
- Two IPMB ports (two signals each; four signals total)
- Geographic address (eight signals)
The analog test and ring voltage pins are left unconnected. FIGURE A-4 shows the pin assignments.
FIGURE A-4 Power Distribution Connector (Zone 1) P10
TABLE A-6 lists the power distribution connector pin assignments.
TABLE A-6 Power Distribution Connector Pin Assignments
|
Pin Number
|
Name
|
Description
|
|
1
|
Reserved
|
Reserved
|
|
2
|
Reserved
|
Reserved
|
|
3
|
Reserved
|
Reserved
|
|
4
|
Reserved
|
Reserved
|
|
5
|
HA0
|
HA0 Hardware Address Bit 0
|
|
6
|
HA1
|
HA1 Hardware Address Bit 1
|
|
7
|
HA2
|
HA2 Hardware Address Bit 2
|
|
8
|
HA3
|
HA3 Hardware Address Bit 3
|
|
9
|
HA4
|
HA4 Hardware Address Bit 4
|
|
10
|
HA5
|
HA5 Hardware Address Bit 5
|
|
11
|
HA6
|
HA6 Hardware Address Bit 6
|
|
12
|
HA7/P
|
HA7/P Hardware Address Bit 7 (Odd Parity Bit)
|
|
13
|
SCL_A
|
IPMB Clock, Port A
|
|
14
|
SDA_A
|
IPMB Data, Port A
|
|
15
|
SCL_B
|
IPMB Clock, Port B
|
|
16
|
SDA_B
|
IPMB Data, Port B
|
|
17
|
MT1_TIP
|
Metallic Test #1 Tip
|
|
18
|
MT1_TIP
|
Metallic Test #2 Tip
|
|
19
|
-RING_A
|
Ringing Generator A Negative Ringing
|
|
20
|
-RING_B
|
Ringing Generator B Negative Ringing
|
|
21
|
MT1_RING
|
Metallic Test #1 Ringing
|
|
22
|
MT2_RING
|
Metallic Test #2 Ringing
|
|
23
|
-RING_A
|
Ringing Generator AReturn
|
|
24
|
-RING_B
|
Ringing Generator B Return
|
|
25
|
SHELF_GND
|
Shelf Ground
|
|
26
|
LOGIC_GND
|
Logic Ground
|
|
27
|
ENABLE_B
|
Enable B
|
|
28
|
VRTN_A
|
Voltage Return A
|
|
29
|
VRTN_B
|
Voltage Return B
|
|
30
|
EARLY_A
|
-48V Early A
|
|
31
|
EARLY_B
|
-48V Early B
|
|
32
|
ENABLE_A
|
Enable A
|
|
33
|
-48V_A
|
-48V A
|
|
34
|
-48V_B
|
-48V B
|
A.3.4 Data Transport Connector (Zone 2)
The data transport connector consists of two 120-pin HM-Zd connectors, labeled P20 and P23, with 40 differential pairs each. These are called the Zone 2 connectors.
The Zone 2 connectors provides the following signals:
- Two 10/100/1000BASE-T/TX Ethernet base fabric channels (four differential signal pairs each; 16 signals total)
- Two 10-Gbit SERDES ports on the extended fabric (eight differential signal pairs each; 32 signals total)
The connector vendor part number is Tyco: 1469001-1.
FIGURE A-5 Zone 2 Connector
TABLE A-7 Zone 2 Connector Pin Assignments
|
Row
No.
|
Interface
Designation
|
J23/P23 Connector Pairs
|
|
ab
|
cd
|
ef
|
gh
|
|
1
|
Fabric Channel 2
|
Tx2[2]+
|
Tx2[2]-
|
Rx2[2]+
|
Rx2[2]-
|
Tx3[2]+
|
Tx3[2]-
|
Rx3[2]+
|
Rx3[2]-
|
|
2
|
Tx0[2]+
|
Tx0[2]-
|
Rx0[2]+
|
Rx0[2]-
|
Tx1[2]+
|
Tx1[2]-
|
Rx1[2]+
|
Rx1[2]-
|
|
3
|
Fabric Channel 1
|
Tx2[1]+
|
Tx2[1]-
|
Rx2[1]+
|
Rx2[1]-
|
Tx3[1]+
|
Tx3[1]-
|
Rx3[1]+
|
Rx3[1]-
|
|
4
|
Tx0[1]+
|
Tx0[1]-
|
Rx0[1]+
|
Rx0[1]-
|
Tx1[1]+
|
Tx1[1]-
|
Rx1[1]+
|
Rx1[1]-
|
|
5
|
Base Channel 1
|
BI_DA1+
(Tx1+)
|
BI_DA1-(Tx1-)
|
BI_DB1+(Rx1+)
|
BI_DB1-(Rx1-)
|
BI_DC1+
|
BI_DC1-
|
BI_DD1+
|
BI_DD1-
|
|
6
|
Base Channel 2
|
BI_DA2+(Tx2+)
|
BI_DA2-(Tx2-)
|
BI_DB2+(Rx2+)
|
BI_DB2-(Rx2-)
|
BI_DC2+
|
BI_DC2-
|
BI_DD2+
|
BI_DD2-
|
|
7
|
n/a
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
|
8
|
n/a
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
|
9
|
n/a
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
|
10
|
n/a
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
unused
|
A.3.5 Advanced Rear Transition Module Connector (Zone 3)
The Sun Netra CP3220 blade server provides all the I/O connections for rear access through the Zone 3 ARTM connector. The connector view and the pinout for the Zone 3 connector are shown in FIGURE A-6.
FIGURE A-6 Zone 3 Connector
TABLE A-8 shows the J31 connector pin assignments, used for AMC I/O signals.
TABLE A-8 J31 Connector Pin Assignments
|
Row
|
Interface
|
A
|
B
|
C
|
D
|
E
|
F
|
|
1
|
AMC1 EO Ports
|
TX1_13+
|
TX1_13-
|
RX1_12+
|
RX1_12-
|
TX1_12+
|
TX1_12-
|
|
2
|
RX1_14+
|
RX1_14-
|
TX1_14+
|
TX1_14-
|
RX1_13+
|
RX1_13-
|
|
3
|
TX1_17+
|
TX1_17-
|
RX1_15+
|
RX1_15-
|
TX1_15+
|
TX1_15-
|
|
4
|
RX1_18+
|
RX1_18-
|
TX1_18+
|
TX1_18-
|
RX1_17+
|
RX1_17-
|
|
5
|
TX1_20+
|
TX1_20-
|
RX1_19+
|
RX1_19-
|
TX1_19+
|
TX1_19-
|
|
6
|
RX2_12+
|
RX2_12-
|
TX2_12+
|
TX2_12-
|
RX1_20+
|
RX1_20-
|
|
7
|
AMC2 EO Ports
|
TX2_14+
|
TX2_14-
|
RX2_13+
|
RX2_13-
|
TX2_13+
|
TX2_13-
|
|
8
|
RX2_15+
|
RX2_15-
|
TX2_15+
|
TX2_15-
|
RX2_14+
|
RX2_14-
|
|
9
|
TX2_18+
|
TX2_18-
|
RX2_17+
|
RX2_17-
|
TX2_17+
|
TX2_17-
|
|
10
|
RX2_19+
|
RX2_19-
|
TX2_19+
|
TX2_19-
|
RX2_18+
|
RX2_18-
|
TABLE A-9 shows the J32 connector pin assignments, which are used for infrastructure signals.
TABLE A-9 J32 Connector Pin Assignments
|
Row
|
Interface
|
A
|
B
|
C
|
D
|
E
|
F
|
|
1
|
AMC2 EO Ports
|
NC
|
NC
|
RX2_20+
|
RX2_20-
|
TX2_20+
|
TX2_20+
|
|
2
|
SAS/SATA0 - SER0
|
SA_TX0+
|
SA_TX0-
|
SA_RX0+
|
SA_RX0-
|
SR0_RTS
|
SR0_DTR
|
|
3
|
SAS/SATA1 - SER0
|
SA_TX1+
|
SA_TX1-
|
SA_RX1+
|
SA_RX1-
|
SR0_TXD
|
SR0_RXD
|
|
4
|
SAS/SATA2 - SER0
|
SA_TX2+
|
SA_TX2-
|
SA_RX2+
|
SA_RX2-
|
SR0_DSR
|
SR0_CTS
|
|
5
|
SAS/SATA3 - SER0
|
SA_TX3+
|
SA_TX3-
|
SA_RX3+
|
SA_RX3-
|
NC
|
NC
|
|
6
|
LAN0 (MNGT)
|
LAN0_A+
|
LAN0_A-
|
LAN0_CTV
|
LAN0_CTV
|
LAN0_B+
|
LAN0_B-
|
|
7
|
LAN0_C+
|
LAN0_C-
|
ACT_LED#
|
LINK_LED#
|
LAN0_D+
|
LAN0_D-
|
|
8
|
LAN1 (SerDes)
|
SLAN_TX1+
|
SLAN_TX1-
|
SLAN_RX1+
|
SLAN_RX1-
|
NC
|
NC
|
|
9
|
LAN2 & LAN4 (SerDes)
|
SLAN_TX2+
|
SLAN_TX2-
|
SLAN_RX2+
|
SLAN_RX2-
|
SLAN_TX4+
|
SLAN_TX4-
|
|
10
|
LAN3 & LAN4 (SerDes)
|
SLAN_TX3+
|
SLAN_TX3-
|
SLAN_RX3+
|
SLAN_RX3-
|
SLAN_RX4+
|
SLAN_RX4-
|
TABLE A-10 shows the J33 connector pin assignments, which are used for PCIe signals.
TABLE A-10 J33 Connector Pin Assignments
|
Row
|
Interface
|
A
|
B
|
C
|
D
|
E
|
F
|
|
1
|
PCIe x8 Lane
|
PETx0+
|
PETx0-
|
PERx0+
|
PERx0-
|
FCLKA+
|
FCLKA-
|
|
2
|
PETx1+
|
PETx1-
|
PERx1+
|
PERx1-
|
TCLKA+
|
TCLKA-
|
|
3
|
PETx2+
|
PETx2-
|
PERx2+
|
PERx2-
|
TCLKB+
|
TCLKB-
|
|
4
|
PETx3+
|
PETx3-
|
PERx3+
|
PERx3-
|
TCLKC+
|
TCLKC-
|
|
5
|
PETx4+
|
PETx4-
|
PERx4+
|
PERx4-
|
TCLKD+
|
TCLKD-
|
|
6
|
PETx5+
|
PETx5-
|
PERx5+
|
PERx5-
|
TCK
|
TMS
|
|
7
|
PETx6+
|
PETx6-
|
PERx6+
|
PERx6-
|
TRST#
|
TDO
|
|
8
|
PETx7+
|
PETx7-
|
PERx7+
|
PERx7-
|
TDI
|
PCI_RST#
|
|
9
|
|
NC
|
NC
|
NC
|
NC
|
RTM#
|
PCI_CFG
|
|
10
|
|
NC
|
NC
|
NC
|
NC
|
PS0#
|
Enable#
|
| Sun Netra CP3220 Blade Server User’s Guide
|
820-1982-12
|
   
|
Copyright © 2009 Sun Microsystems, Inc. All rights reserved.