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3DRAM Test
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The 3DRAM Test thoroughly tests the video memory in the FFB using 512-bit reads and writes. 3DRAM makes a full screen pass, consisting of a write and a read to each pixel location, for each access mode on the list below. You can use either random data or specify data at the command line. A second pass is made with the one's complement of the data used in the first pass so that each memory location is tested with both a zero and a one. Notice that some passes are skipped on the single-buffered FFB.
Errors in this subtest are attributes to the 3DRAM. A failing chip is indicated by (x, y) locations and device-specific "U" numbers.
DFB8R, DFB8G, DFB8B, DFB8X - Buffer A
DFB24 - Buffer A
DFB32 - Buffer A
SFB8R, SFB8G, SFB8B, SFB8X - Buffer A
SFB8R, SFB8G, SFB8B, SFB8X - Buffer B (double buffer only)
SFB32
- Buffer A
SFB32 - Buffer B (double buffer only)
SFB32 - Buffer C (double buffer only)
SFB64 - Buffers A and C (double buffer only)
SFB64 - Buffers B and C (double buffer only)
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3DRAM Logic Test
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3DRAM Logic provides logical functionality to the FFB. The following services are tested:
Compare Controls - Match AB
Compare Controls - Magnitude AB
Compare Controls - Match C (double buffer only)
Compare Controls - Magnitude C (double buffer only)
Match Mask - AB
Magnitude Mask - AB
Match Mask - C (double buffer only)
Magnitude Mask - C (double buffer only)
Raster Operations - RGB
Raster Operations - X
Raster Operations - YZ (double buffer only)
Plane Mask - RGB
Plane Mask - X
Plane Mask - Y
Plane Mask - Z
Group Enable - R, G, B, X
Group Enable - Y, Z (double buffer only)
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3DRAM Logic Test
(Continued)
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ffbtest tests each function separately with a series of SFB64 writes. A total of 16 writes are made for each different test case with Y coordinate values varying from 0 to 30 in increments of 2 pixels. This dotted column organization provides page thrashing and block flashing in all screen resolutions. For each operation, all possible combinations are tested. For example, ROP
RGB new==old has three possible values are: new < old, new
== old, and new >
old. ffbtest tests each of these cases.
Five passes of the functions are made. Each pass writes into a different FFB address space: SFB32-A, SFB32-B, SFB32-C, SFB64-AC, and SFB64-BC. Note that the passes that write into the SFB32 address spaces are writing two pixels at a time because the tests use SFB64 writes.
For FFB2+ boards, additional testing is performed on the new stencil and passin capabilities if the board is DBZ.
Care is taken to ensure that all 3DRAM chips are tested. Errors in this subtest are attributed to the 3DRAM.
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RAMDAC Test
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RAMDAC registers are tested using simple read/write patterns to determine if there are any bad bits. This includes all LUTs. ffbtest ensures that data is actually being read from the RAMDAC and not being supplied by the driver.
Next, the RAMDAC Signature Register captures the pixels going to the screen. This test determines that all of the different data paths within the RAMDAC are functioning properly.
The following modes are tested:
24-bit true color from A
24-bit true linear color from A
24-bit direct color from A
24-bit true color from B (double buffer only)
24-bit true linear color from B
24-bit direct color from B (double buffer only)
8-bit pseudo color (from each plane in RGB) from A
8-bit pseudo color (from each plane in RGB) from B (double buffer only)
8-bit
non-linear grayscale (from each plane in RGB) from A
8-bit non-linear grayscale (from each plane in RGB) from B (double buffer only)
8-bit linear grayscale (from each plane in XRGB) from A
8-bit linear grayscale (from each plane in XRGB) from B (double buffer only)
8-bit overlay pseudo color (from buffer A, X plane)
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RAMDAC Test
(Continued)
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This test displays a total of 11 different types of windows on the screen for the single-buffered configuration; 22 for double-buffered. A cursor is also displayed on the screen.
RAMDAC on FFB2+ board supports three modes (SEP8, SEP4 and Combined). This test detects the RAMDAC type and tests the original and additional features like increased number of CLUTs, increased WLUT size, additional overlay WLUT.
Errors in this test are attributed to the RAMDAC.
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Rendering Pipeline Test
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Rendering Pipeline uses the rendering pipeline tests developed for the FFB stand-alone diagnostics.
Each primitive is tested thoroughly with the following sources and configurations:
Errors in this test are attributed to the FBC.
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Fast Fill/Vertical Scroll Test
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The Fast Fill/Vertical Scroll primitives are separated from the Rendering Pipeline tests because of their dependence on screen type. There are three different tests, one for each screen type. Each test uses both block and page mode fistfuls.
Errors in this test are attributed to the FBC.
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Pixel Process Test
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Pixel Processor, a subtest, exercises the following options selected by the FFB's Pixel Processor Control (PPC) register.
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Auxiliary clipping (additive and subtractive)
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Depth cueing
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Alpha blend
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Viewport clip (2D and 3D)
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Area pattern (transparent and opaque)
Errors in this test are attributed to the FBC.
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Picking Test
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The Picking test exercises the pick detect login of the 3DRAM. ffbtest defines a pick detect window and checks that writes to the window are picked, and writes outside the window are not picked. The test is repeated once for each 3DRAM.
Errors in this test are attributed to the 3DRAM.
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Arbitration Test
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Arbitration, a subtest, continuously renders an object into the accelerator port while performing reads and writes through the direct port. For single-buffered configuration, a picture is rendered into the RGB planes while another process does DFB reads and writes in the X plane. For doubled buffered configuration, a picture is rendered into all 32 planes of the B buffer while the other does 32-bit DFB reads and writes in the A plane. This subtest simulates conditions in the read world, where rendering processes and windows operations run concurrently.
Errors in this test are attributed to the FBC.
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Stereo Test
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The Stereo test displays an object in stereo mode with different images for the right and left eye. The user can verify proper operation by looking at the screen with stereo glasses and following the displayed instructions. If the monitor type is not 1280x1024 @ 76MHz, this test prints a warning message and does not run. To prevent this message from being displayed or written to the SunVTS information log, disable the stereo test in the test option menu. Only Sony P4 and N2 monitors support stereo resolutions. This test temporarily switches the monitor into stereo mode, renders a stereo image, performs a signature analysis on the stereo image (using the RAMDAC signature capture register), and after displaying the image for five seconds, restores the monitor to its previous resolution.
Errors in this test are attributed to the RAMDAC.
NOTE -- If vertical lines are displayed on the console when running
SunVTS, this could be caused by the ffbtest stereo test. There is a time-critical period in the FFB hardware when trying to change the screen resolution from standard to stereo and back to standard. When the system is heavily loaded or running all of the SunVTS tests, the FFB device driver may get interrupted while changing screen resolution. If this occurs, FB ASIC and RAMDAC get out of synchronization, resulting in an unusual display on the FFB screen. This problem could also cause a system hang condition.
This test is disabled by default because it is only needed when a stereo monitor and stereo glasses are present.
To avoid this type of display problem, disable the ffbtest stereo test when other SunVTS tests are enabled.
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