SPARC Instruction Sets and Mnemonics

Language:

This appendix provides information about the SPARC instruction sets, operation codes, and mnemonics accepted by the assembler.

The full SPARC instruction set is detailed in Oracle SPARC Architecture 2011 (OSA).

C.1 Natural Instructions

Some of the synthetic SPARC instructions were extended to include the natural operations, which are interpreted differently for –m32 and –m64 assembly.

Table 11 Natural Instructions for SPARC

Natural Instruction	`–m32` Interpretation	`–m64` Interpretation
`ldn`	`ld`	`ldx`
`stn`	`st`	`stx`
`ldna`	`lda`	`ldax`
`stna`	`sta`	`stxa`
`casn`	`cas`	`casx`
`slln`	`sll`	`sllx`
`srln`	`srl`	`srlx`
`sran`	`sra`	`srax`
`clrn`	`clr`	`clrx`
`setn`	`set`	`setx`
`setnhi`	`sethi`	`setxhi`

C.1.1 Natural Register, Natural Word for SPARC

In addition to natural instructions, the natural register %ncc and the natural word pseudo-op .nword are interpreted differently for –m32 and –m64 assembly.

Table 12 Natural Register and Word for SPARC

Register and Word	`-m32` Interpretation	`-m64` Interpretation
`%ncc` register	`%icc`	`%xcc`
`.nword`	`.word`	`.xword`