Bus Arbitration

Bus arbitration by the SBus enables concurrent arbitration and transfer execution. The PCI arbitration is access-based, not time-slot-based, to minimize access latency.

SBus

When more than one SBus master requests bus access, the controller grants access to one of the requesters. Enabling arbitration concurrent while the master makes a data transfer referred to as hidden arbitration.

PCI

In PCI arbitration, a bus master must arbitrate for each bus access.

The PCI specification does not define the PCI bus arbitration scheme. The arbiter may use any scheme, but the 2.1 specification requires that the arbiter implement a fairness algorithm to avoid deadlocks.