This chapter provides suggested paths to troubleshoot a malfunctioning system. Follow the flow diagrams sequentially to help isolate problems, or start at any point, as shown in Table 4-1.
Table 4-1 Troubleshooting Jump Table
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Problem Area Flowchart Reference --------------------------------------------------------------------------
Physical system A.1 Figure 4-3
Faulty SPARC module A.2 Figure 4-4
Power-on Self-tests (POST) B.1, B.2 Figure 4-5 and Figure 4-6
Faulty system board A.2, B.2 Figure 4-4 and Figure 4-6
Faulty SIMMs B.3 Figure 4-7
Faulty SBus cards B.4 Figure 4-8
System does not boot C.1, D.1, D.2 Figures 4-9, 4-10, and 4-11
System configuration C.1, D.1, D.2 Figures 4-9, 4-10, and 4-11
Wrong boot path D.2 Figure 4-11
Network configuration E.1 Figure 4-12
Client boot status E.2,E.3,E.4 Figure 4-13
Ethernet error messages E.5 Figure 4-14
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To view the display messages from POST, set up the tty terminal as follows:
Caution -
Figure 4-1 600MP System Board Back Panel Connectors
Figure 4-2 Troubleshooting Flow Diagram Overview
Figure 4-3 Branch A.1: Physical Inspection
Figure 4-4 Branch A.2: Checking the SPARC Modules
Figure 4-6 Branch B.2: Does Not Pass Self-tests
Figure 4-7 Branch B.3: SIMM Memory Faults
Figure 4-8 Branch B.4: SBus Card Faults
Figure 4-9 Branch C.1: Monitoring the System Boot-up
Figure 4-10 Branch D.1: System Bus Configuration
Figure 4-11 Branch D.2: Checking Boot Path and NVRAM
Figure 4-12 Branch E.1: Checking the Net
Figure 4-13 Branches E.2, E.3, and E.4: Client Boot Status
Figure 4-14 Branch E.5: Additional Ethernet Messages
Tables below list Power-on Self-tests in the order in which they run. Also shown are LED patterns for failed tests and effected Field Replaceable Units (FRUs). The PROM revision level displays when POST runs in DIAG mode.
To identify a failed test from the LED array on the SPARCsystem 600MP System Board back panel, match the LED pattern with a pattern on this table.
Note - The LED patterns and corresponding hexadecimal values are shown in this table in error mode. The last LED (bit11) is lit for all of the tests.
Figure 4-15 LED Orientation
Table 4-2 lists the abbreviations for the FRUs in this chapter.
Table 4-3 lists the Power-on Self-tests in the order in which they are run.
Table 4-2 FRU Abbreviations Used in this Chapter
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Abbreviation Hardware FRU --------------------------------------------------------------------------------------
SM1XX SM1XX Module
SMxx SMxx Module
PROM EPROM Chip
EXPM Expansion Memory Board
NV NVRAM Chip
SIMM Single In-Line Memory Module
600SB SPARCsystem 600MP System Board
-- None, or the hardware being tested is indicated in the test description
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Table 4-3 SPARCserver 600 MP DiagPROM LED Patterns
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LED Error Display Error Self-Test Name Affected l= ON m=OFF Hex # FRU ------------------------------------------------------------------------------------------------------------
Silent Tests
<- <-< -<- <- <-<-<- <-<-<-<- (All LEDs light in sequence)
l l l l l l l l l l l l led walking 1 test 600SB
l m m m m m m l l l l l0x81f eprom data path test 600SB
l m m m m m m l m m l m0x812 uart internal register oxc write/write/readtest 600SB
l m m m m m m l m m l l0x813 serial port a loopback test 600SB
l m m m m m m l m l m m0x814 serial port b loopback test 600SB
l m m m m m m l m l m l0x815 nvram test 600SB
l m m m m m m l m l l m0x816 memory refresh test jumpers
Quick Memory Tests
l m m m m m m m m m l m0x802 memory quick walking 1's test SIMM
l m m m m m m m m m l l0x803 memory quick address test SIMM
Quick Memory Tests
l m m m m m m m m l m m0x804 memory quick access size test SIMM
l m m m m m m m m l m l0x805 limited memory test SIMM
l m m m l m l l m m l l0x8b3 vme loopback test 600SB
SM1XX-specific Tests
l m m m m m l m m m m m0x820 mmu bypass mode test SM1XX
l m m m m m l m m m m l0x821 SM1XX register rest SM1XX
l m m m m m l m m m l m0x822 mmu tlb cam-ram walking 1 test SM1XX
l m m m m m l m m m l l0x823 mmu tlb flush test SM1XX
l m m m m m l m m l m m0x824 mmu tlb hit test SM1XX
l m m m m m l m m l m l0x825 mmu table walk test SM1XX
l m m m m m l m m l l m0x826 mmu table walk protect error test SM1XX
l m m m m l l l m m m m0x870 cache ram test SM1XX
l m m m m l l l m m m l0x871 cache byte addressing in line test SM1XX
l m m m m l l l m m l m0x872 cache check va superset path test SM1XX
l m m m m l l l m m l l0x873 cache pvtag tag compare test SM1XX
l m m m m l l l m l m m0x874 cache pvtag cxn compare test SM1XX
l m m m m l l l m l m l0x875 cache block address test SM1XX
l m m m m l l l m l l m0x876 cache flush asi test SM1XX
l m m m m l l l m l l l0x877 cache alias test SM1XX
l m m m m l l l l m m m0x878 cache write buffer test SM1XX
l m m m m l l l l m m l0x879 cache no cache test SM1XX
l m m m m l l l l m l m0x87a cache processor access test SM1XX
l m m m m l l l l m l l0x87b cache dvma walking 1's mptag test SM1XX
l m m m m l l l l l m m0x87c cache dvma walking 1's va superset test SM1XX
SMXX-specific Tests
l m l m m m m m m m m m0xa00 SMXX registers test SMxx
l m l m m m m m m m m l0xa01 mxcc registers test SMxx
l m l m m m m m m m l m0xa02 SMXX tlb ram test SMxx
l m l m m m m m m m l l0xa03 SMXX i/d cache ram test SMxx
l m l m m m m m m l m m0xa04 mxcc e$ram test SMxx
l m l m m m m m m l m l0xa05 SMXX mmu root/12 ptp cache invalid test SMxx
l m l m m m m m m l l m0xa06 SMXX mmu stuff tlb test SMxx
l m l m m m m m m l l l0xa07 SMXX mmu probe table walk test SMxx
l m l m m m m m l m m m0xa08 SMXX mmu flush test SMxx
l m l m m m m m l m m l0xa09 SMXX mmu tlb lock test SMxx
l m l m m m m m l m l m0xa0a mmu table walk protect error test SMxx
l m l m m m m m l m l l0xa0b SMXX mmu table walk cacheable parity err. test SMxx
l m l m m m m m l l m m0xa0c SMXX mmu table walk ecc error test SMxx
l m l m m m m m l l m l0xa0d SMXX flash clear i/d test SMxx
l m l m m m m m l l l m0xa0e SMXX i/d cache mru, SMxx
most-recently-used test
l m l m m m m m l l l l0xa0f SMXX i/d cache lock test SMxx
l m l m m m m l m m m m0xa10 SMXX d cache read miss-hit test SMxx
l m l m m m m l m m m l0xa11 SMXX d cache write miss test SMxx
l m l m m m m l m m l m0xa12 SMXX d cache write hit test SMxx
l m l m m m m l m m l l0xa13 SMXX i/d cache random data test SMxx
l m l m m m m l m l m m0xa14 mxcc non-e$able block zero test SMxx
l m l m m m m l m lm l0xa15 mxcc parity ram test SMxx
SMXX-specific Tests
l m l m m m m l m l l m0xa16 mxcc e$parity error test SMxx
l m l m m m m l m l l l0xa17 mxcc non-$able block copy test SMxx
l m l m m m m l lm m m0xa18 mxcc e$able block read test SMxx
l m l m m m m l l m m l0xa19 mxcc e$able block write test SMxx
System Tests
l m m m l m m l l l m l0x89d system tod test NV
l m m m l m m l l l l m0x89e keyboard local loopback test 600SB
l m m m l m m l l l l l0x89f mouse local loopback test 600SB
l m m m l m l m m m m m0x8a0 soft interrupt test 1 - walk 1 bit 600SB
l m m m l m l m m m m l0x8a1 soft interrupt test 2 - walk 2 bits 600SB
l m m m l m l m m m l m0x8a2 user/timer test 1 - user timer test 600SB
l m m m l m l m m m l l0x8a3 user/timer test 2 - counter timer0 test 600SB
l m m m l m l m m l m m0x8a4 user/timer test 3 - system counter timer test 600SB
l m m m l m l m m l m l0x8a5 mmc diagnostic register test 600SB
l m m m l m l m m l l m0x8a6 ecc walking 1 to 64/8 data/check bits test SIMM/600SB
l m m m l m l m m l l l0x8a7 ecc ce syndrome test SIMM/600SB
l m m m l m l m l m m m0x8a8 ecc ue syndrome test SIMM/600SB
l m m m l m l m l m m l0x8a9 ecc ne/ce/ue on 1, 2, 4, 8-byte accesses test SIMM/600SB
l m m m l m l m l m l m0x8aa ecc memory timeout test SIMM/600SB
l m m m l m l m l m l l0x8ab ecc error accumulation/priority test SIMM/600SB
l m m m l m l m l l m l0x8ad msi registers test 600SB
l m m m l m l m l l l m0x8ae iommu cam data pattern w/w/r and address test 600SB
l m m m l m l m l l l l0x8af iommu ram data pattern w/w/r and address test 600SB
l m m m l m l l m m m m0x8b0 vic internal registers test 600SB
l m m m l m l l m m m l0x8b1 msi iommu tlb va address compare test 600SB
l m m m l m l l m m l m0x8b2 msi iommu tlb flush test 600SB
l m m m l m l l m l m m0x8b4 msi cpu data buffer test 600SB
l m m m l m l l m l m l0x8b5 msi dvma buffer byte test 600SB
l m m m l m l l m l l m0x8b6 msi dvma buffer halfword test 600SB
l m m m l m l l m l l l0x8b7 msi dvma buffer word test 600SB
l m m m l m l l l m m m0x8b8 msi iommu tlb hit test 600SB
l m m m l m l l l m m l0x8b9 msi iommu tlb flush/miss test 600SB
l m m m l m l l l m l m0x8ba msi iommu tlb hit/miss test 600SB
l m m m l m l l l m l l0x8bb msi lruq test 1 600SB
l m m m l m l l l l m m0x8bc msi lruq test 2 600SB
l m m m l m l l l l m l0x8bd msi lruq test 3 600SB
l m m m l m l l l l l m0x8be msi lruq test 4 600SB
l m m m l m l l l l l l0x8bf msi lruq test 5 600SB
l m m m l l m m m m m m0x8c0 lance buffered memory test 600SB
l m m m l l m m m m m l0x8c1 lance internal registers test 600SB
l m m m l l m m m m l m0x8c2 keyboard/mouse internal register 12 w/w/r test 600SB
l m m m l l m m m m l l0x8c3 esc internal registers test 600SB
l m m m l l m m m l m m0x8c4 lance local loopback test 600SB
l m m m l l m m m l m l0x8c5 lance external loopback test 600SB
l m m m l l m m m l l m0x8c6 ioc tag and data ram march test 600SB
l m m m l l m m m l l l0x8c7 ioc fill test 1, vm=00, tag mismatch, fill 600SB
l m m m l l m m l m m m0x8c8 ioc fill test 2, vm=10, tag match, no fill 600SB
l m m m l l m m l m m l0x8c9 ioc fill test 3, vm =10, tag mismatch, fill 600SB
l m m m l l m m l m l m0x8ca ioc writeback test 1, vm=00, tag mismatch, no 600SB
wrtbk
l m m m l l m m l m l l0x8cb ioc writeback test 2, vm=11, tag match, no 600SB
wrtbk
l m m m l l m m l l m m0x8cc ioc writeback test 3, vm=11, tag mismatch, 600SB
wrtbk
l m m m l l m m l l m l0x8cd ioc flush test 600SB
l m m m l l m m l l l m0x8ce ioc tag test - walking 1 across a[12:5] 600SB
l m m m l l m m l l l l0x8cf ioc block test - walking 1 across a[22:13] 600SB
l m m m l l m l m m m m0x8d0 vic fault test 600SB
l m m m l l m l l m l l0x8db ioc random write test 600SB
l m m m l l m l l l m m0x8dc ioc random read test 600SB
l m m m l l l m m l m m0x8e4 esp internal registers test 600SB
l m m m l l l m m l m l0x8e5 esp dma read test 600SB
l m m m l l l m m l l m0x8e6 esp dma write test 600SB
l m m m l l l m m l l l0x8e7 esp dma write error test 600SB
l m m m l l l m l m m m0x8e8 sbus to sbus transactions test 600SB
l m m m l l l m l m m l0x8e9 sec ground bounce test 600SB
l m m m l l l m l m l m0x8ea vic - ioc data ram ground bounce test 600SB
l m m m l l l m l m l l0x8eb vic - ioc tag ram ground bounce test 600SB
l m m m l l l m l l m m0x8ec mmc - cpu memory ground bounce test 600SB
l m m m l l l m l l m l0x8ed esc - ether memory ground bounce test 600SB
l m m m l l l m l l l l0x8ef msi reserved address space test 600SB
l m m m l l l l m m m m0x8f0 memory 16 and 32-byte access test 600SB
l m m m l l l l m m m l0x8f1 mem coherent access without cache intervention SM1XX/600SB
test
l m m m l l l l m m l l0x8f3 ecc ne/ce/ue on 16 and 32-byteaccesses test 600SB
l m m m l l l l m l m m0x8f4 ecc mem coherent access without cache SM1XX/600SB
intervention test
l m m m l l l l m l l m0x8f6 expansion memory ping pong random data test SIMM/EXPM
l m m m l l l l m l l l0x8f7 audio reg test 600SB
l m m m l l l l l m m m0x8f8 audio internal loopback test 600SB
SM1XX-specific Multiprocessing Tests
l m m m l l l l m m l m0x8f2 mem coherent access with cache intervent. test SM1XX
l m m m l l l l m l m l0x8f5 ecc mem coherent access with cache SM1XX/600SB
intervention test
l m m l m m m m m m m m0x900 cpu0 access miss, cpu123 snoop miss test SM1XX
l m m l m m m m m m m l0x901 cpu0 access hit, cpu123 snoop miss test SM1XX
l m m l m m m m m m l m0x902 cpu0 access miss, cpu123 snoop hit test SM1XX
l m m l m m m l m m m m0x910 dvma access, cpu0 snoop hit, cpu 123 snoop hit SM1XX
l m m l m m m l m m m l0x911 dvma access, cpu0 snoop hit, cpu 123 snoop SM1XX
miss
l m m l m m m l m m l m0x912 dvma access, cpu0 snoop miss, cpu 123 snoop SM1XX
hit
l m m l m l l m m m m m0x960 mp_605 a.2 tlb miss screen test SM1XX
l m m l m l l m m m l m0x962 mp605 a.2 write buffer invalidation bug screen SM1XX
test
l m m l m l l m m m l l0x963 mp605 a.3 blown write on atomic cycles with SM1XX
intervention test
SMXX-specific Multiprocessing Tests
l m l m m l m m m m m m0xa40 mp mxcc external access test SMxx
l m l m m l m m m m m l0xa41 mp lock modify test SMxx
l m l m m l m m m m l m0xa42 mp thrash shared block test SMxx
Execute from Cache Tests
l m l m m l m m l m m l0xa49 cachex random data test SM1XX/SMxx
l m l m m l m l m m m m0xa50 mem marching test SIMM
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