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Oracle Solaris Studio 12.3: C User's Guide Oracle Solaris Studio 12.3 Information Library |
1. Introduction to the C Compiler
2. C-Compiler Implementation-Specific Information
3.1 Overview of Parallelization
3.2.1 Handling OpenMP Runtime Warnings
3.2.3 Using restrict in Parallel Code
3.3 Data Dependence and Interference
3.3.1 Parallel Execution Model
3.3.2 Private Scalars and Private Arrays
3.5 Load Balance and Loop Scheduling
3.5.1 Static or Chunk Scheduling
3.7 Aliasing and Parallelization
3.7.1 Array and Pointer References
7. Converting Applications for a 64-Bit Environment
8. cscope: Interactively Examining a C Program
A. Compiler Options Grouped by Functionality
B. C Compiler Options Reference
C. Implementation-Defined ISO/IEC C99 Behavior
E. Implementation-Defined ISO/IEC C90 Behavior
H. Oracle Solaris Studio C: Differences Between K&R C and ISO C
The compiler provides the header file mbarrier.h, which defines various memory-barrier intrinsics for SPARC and x86 processors. These intrinsics may be of use to developers writing multithreaded code using their own synchronization primitives. Refer to the documentation of their processors to determine when and whether these intrinsics are necessary for their particular situation.
Memory-ordering intrinsics supported by mbarrier.h are:
__machine_r_barrier() — This is a read barrier. It ensures that all the load operations before the barrier will be completed before all the load operations after the barrier.
__machine_w_barrier() — This is a write barrier. It ensures that all the store operations before the barrier will be completed before all the store operations after the barrier.
__machine_rw_barrier() — This is a read-write barrier. It ensures that all the load and store operations before the barrier will be completed before all the load and store operations after the barrier.
__machine_acq_barrier() — This is a barrier with acquire semantics. It ensures that all the load operations before the barrier will be completed before all the load and store operations after the barrier.
__machine_rel_barrier() — This is a barrier with release semantics. It ensures that all the load and store operations before the barrier will be completed before all the store operations after the barrier.
__compiler_barrier() — Prevents the compiler from moving memory accesses across the barrier.
All the barrier intrinsics except the __compiler_barrier() intrinsic generate memory-ordering instructions. On x86 platforms, these are mfence, sfence, or lfence instructions. On SPARC platforms, these are membar instructions.
The __compiler_barrier() intrinsic generates no instructions and instead informs the compiler that all previous memory operations must be completed before any future memory operations are initiated. The practical result is that all non-local variables and local variables with the static storage class specifier will be stored back to memory before the barrier, and reloaded after the barrier. The compiler will not mix memory operations from before the barrier with those after. All other barriers implicitly include the behavior of the __compiler_barrier() intrinsic.
In the following example, the presence of the __compiler_barrier() intrinsic stops the compiler from merging the two loops:
#include "mbarrier.h" int thread_start[16]; void start_work() { /* Start all threads */ for (int i=0; i<8; i++) { thread_start[i]=1; } __compiler_barrier(); /* Wait for all threads to complete */ for (int i=0; i<8; i++) { while (thread_start[i]==1){} } }