Although you can assign a minimum of one CPU thread to a logical domain, most workloads require more processing power than one thread can provide. You could also assign threads from one CPU to multiple logical domains, but that configuration could present stability issues for the logical domains that share the CPU threads of a single core. You cannot configure a domain to use whole CPU cores and CPU threads simultaneously. CPU core configurations and CPU thread configurations are mutually exclusive. You should assign whole cores to individual logical domains.
The number of available cores that you can use to create guest domains is a function of how many CMIOUs are in the individual PDomain and the number of cores per CPU. The M8 and M7 CPUs each have a total of 32 cores.
Figure 19, Table 19, Cores Per PDomain and Number of Guest Domains lists the cores that are available per PDomain on the servers. The given number of possible guest domains excludes the number of cores (two in these calculations) that are required for the primary domain. The calculation of the number of possible guest domains for each server configuration is based on core boundaries and the recommendation of using two cores as the minimum number per guest domain. If you use CPU threads to create guest domains, you can achieve the maximum number of guest domains per PDomain. If you use one core as the minimum, you can achieve twice as many guests domains as the number listed in the table. The maximum number of guest domains that can be supported is 128.
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The enumeration for physical CPU cores involves node numbers, SCC numbers, and core numbers. SCC and core numbers are directly specified in the NAC name relative to the CMP (for example, CMP-path/CMP/SCCx/COREy). The node number is a function of the CMP path, and it is different on each server.
At the logical level, the ldm command shows cores in a flat enumeration that is non-contiguous. For example,
/SYS/CMIOU0/CM/CMP/SCC0 contains logical cores 0 to 3.
/SYS/CMIOU0/CM/CMP/SCC1 contains logical cores 8 to 11.
/SYS/CMIOU0/CM/CMP/SCC2 contains logical cores 16 to 19.
Each SCC provides four contiguously enumerated cores, but there is a gap of four logical core numbers when going to the next SCC.
The total number of available cores depends on the state of the CPUs that are installed in the server. Each CPU has 32 cores for a total of 256 cores on the SPARC M8-8 and SPARC M7-8 server and 512 cores on the SPARC M7-16 server. To find the number of available cores per CPU, use the show command in Oracle ILOM with the appropriate target. The following example shows the processor CPU_0 running in a degraded state with only 20 available cores).
-> show /System/Processors/CPUs/CPU_0
/System/Processors/CPUs/CPU_0
Targets:
Properties:
health = Degraded
health_details = -
requested_state = Enabled
part_number = Not Available
serial_number = 0000000000000000000b906120121084
location = CMIOU0/CM/CMP (CPU Memory IO Unit 0)
model = Oracle SPARC M7
max_clock_speed = 3.600 GHz
total_cores = 32
enabled_cores = 20
temperature = 45 degrees C
...
->