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Figures |
FIGURE 1-1
Dual Processor Netra CP3010 Board (Front View)
FIGURE 1-2
Netra CP3010 Board (Top View)
FIGURE 1-3
Netra CP3010 Board in an ATCA Shelf Enclosure
FIGURE 1-4
Netra CP30X0 Rear Transition Card
FIGURE 1-5
Relationship of the Netra CP3010 Board, Midplane, and Rear Transition Card
FIGURE 1-6
Netra CP3010 Board Barcode Labeling
FIGURE 2-1
DDR-1 DIMM Memory and PMC Connector Locations
FIGURE 2-2
Installing a DDR-1 DIMM Memory Module
FIGURE 2-3
Removing a DDR-1 DIMM Memory Module
FIGURE 2-4
TOD Battery and Compact Flash Card Locations
FIGURE 2-5
Removing the PMC Filler Panel
FIGURE 2-6
Inserting the PMC Into the PMC Slot
FIGURE 2-7
Securing the PMC Screws
FIGURE 2-8
Replacing the I2C EEPROM
FIGURE 2-9
Installing the Netra CP30X0 Rear Transition Card
FIGURE 2-10
Injector/Ejector Latch and Locking Screw
FIGURE 2-11
Installing Node Board Into Chassis Slot
FIGURE 3-1
Hot-Swap Latch and Hot-Swap LED
FIGURE 3-2
Sample Output of the prtpicl -v Command
FIGURE 4-1
System Flash PROM Map
FIGURE 5-1
Netra CP3010 Board Block Diagram
FIGURE 5-2
DDR Memory Diagram
FIGURE 5-3
JBus Diagram
FIGURE 5-4
SAS Controller Block Diagram
FIGURE 5-5
Serial Interface Block Diagram
FIGURE 5-6
XBus Block Diagram
FIGURE 5-7
XBus Memory Map
FIGURE 5-8
Page Window Address Aliasing
FIGURE 5-9
Boot Page Address Aliasing
FIGURE 5-10
I2C Block Diagram
FIGURE 5-11
Interrupts Block Diagram
FIGURE 5-12
IChip Diagram
FIGURE 5-13
Hard Reset Block Diagram
FIGURE 5-14
Hard Reset Timing Diagram
FIGURE 5-15
Soft Reset Timing Diagram
FIGURE 5-16
Externally Initiated Reset Timing Diagram
FIGURE 5-17
JBus Clock Block Diagram
FIGURE 5-18
CPU and Memory Clock Diagram
FIGURE 5-19
PCI Device Clock Block Diagram
FIGURE A-1
Netra CP3010 Board Layout
FIGURE A-2
Switches and Jumpers
FIGURE A-3
Ethernet RJ-45 Connector
FIGURE A-4
Front Panel Serial Port Diagram
FIGURE A-5
Power Distribution Connector (Zone 1) P10
FIGURE A-6
Zone 2 Connector
FIGURE A-7
Zone 3 Connector
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