x86 Assembly Language Reference Manual

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Updated: December 2014
 
 

3.1 Instruction Overview

It is beyond the scope of this manual to document the x86 architecture instruction set. This chapter provides a general mapping between the Oracle Solaris x86 assembly language mnemonics and the Intel or AMD mnemonics to enable you to refer to the Intel or AMD documentation for detailed information about a specific instruction. Instructions are listed in tables with the following sections:

  • Oracle Solaris mnemonic

  • Intel/AMD mnemonic

  • Description (short)

  • Notes

  • Reference

The reference column lists the page number and code for the Intel or AMD manual that documents the instruction. See Table 3–1 for the codes and links to the associated manuals.

For certain Oracle Solaris mnemonics, the allowed data type suffixes for that mnemonic are indicated in braces ({}) following the mnemonic. For example, bswap{lq} indicates that the following mnemonics are valid: bswap, bswapl (which is the default and equivalent to bswap), and bswapq. See Instructions for information on data type suffixes.

Table 3-1  Instruction References
Manual Code
Name of the Document
Volume
Link
253666-048US/Sep.2013
Intel 64 and IA-32 Architectures Software Developer's Manual
2A
253667-048US/Sep.2013
Intel 64 and IA-32 Architectures Software Developer's Manual
2B
326019-048US/Sep.2013
Intel 64 and IA-32 Architectures Software Developer's Manual
3C
319433-016/Oct.2013
Intel Architecture Instruction Set Extensions Programming Reference
-
AMD:
24594-Rev.3.20-May.2013
AMD64 Architecture Programmer's Manual
3
AMD:
26568-Rev.3.18-Oct.2013
AMD64 Architecture Programmer's Manual
4
AMD:
26569-Rev.3.13-May.2013
AMD64 Architecture Programmer's Manual
5

To locate a specific Oracle Solaris x86 mnemonic, look up the mnemonic in the index.