Node Resources

The term “node” applies to both compute nodes and management nodes.

These tables provide details about the node resource tags, entity paths, and capabilities:

• Table 1, Resources SYS Through P0/D11

• Table 2, Resources P1/D0 Through P1/D11

• Table 3, Resources DBP Through PS1

• Table 4, Resources MB/RISER1 Through BMC

Table 1  Resources SYS Through P0/D11

Tag Entity Path Capabilities SYS {SYSTEM_CHASSIS,0} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR MB {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0} FRU, INVENTORY, POWER, RDR, RESET, RESOURCE, SENSOR MB/BIOS {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{BIOS,0} FRU, INVENTORY, RDR, RESOURCE /SYS/SP {SYSTEM_CHASSIS,0}{SYS_MGMNT_MODULE,0} CONTROL, FRU, INVENTORY, RDR, RESOURCE P0 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D0 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,0} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D1 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,1} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D2 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,2} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D3 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,3} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D4 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,4} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D5 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,5} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D6 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,6} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D7 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,7} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D8 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,8} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D9 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,9} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D10 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,10} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P0/D11 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,0}{MEMORY_DEVICE,11} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR

Table 2  Resources P1/D0 Through P1/D11

Tag Entity Path Capabilities P1/D0 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,12} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D1 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,13} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D2 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,14} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D3 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,15} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D4 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,16} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D5 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,17} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D6 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,18} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D7 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,19} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D8 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,20} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D9 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,21} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D10 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,22} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR P1/D11 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{PROCESSOR,1}{MEMORY_DEVICE,23} CONTROL, FRU, INVENTORY, RDR, RESOURCE, SENSOR

Table 3  Resources DBP Through PS1

Tag Entity Path Capabilities DBP {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,0} FRU, INVENTORY, RDR, RESOURCE HDD0 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,0}{DISK_BAY,10} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD1 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,0}{DISK_BAY,11} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD2 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,0}{DISK_BAY,12} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD3 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,0}{DISK_BAY,13} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD4 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,1}{DISK_BAY,14} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD5 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,1}{DISK_BAY,15} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD6 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,1}{DISK_BAY,16} CONTROL, FRU, RDR, RESOURCE, SENSOR HDD7 {SYSTEM_CHASSIS,0}{DRIVE_BACKPLANE,1}{DISK_BAY,17} CONTROL, FRU, RDR, RESOURCE, SENSOR PS0 {SYSTEM_CHASSIS,0}{POWER_SUPPLY,0} FRU, INVENTORY, RDR, RESOURCE, SENSOR PS1 {SYSTEM_CHASSIS,0}{POWER_SUPPLY,1} FRU, INVENTORY, RDR, RESOURCE, SENSOR

Table 4  Resources MB/RISER1 Through BMC

Tag Entity Path Capabilities MB/RISER1 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,13} FRU, RDR, RESOURCE, SENSOR MB/RISER2 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,14} FRU, RDR, RESOURCE, SENSOR MB/RISER3 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,15} FRU, RDR, RESOURCE, SENSOR R1/PCIE1 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,13} {PCI_EXPRESS_BUS,1} FRU, RDR, RESOURCE, SENSOR R2/PCIE2 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,14} {PCI_EXPRESS_BUS,2} FRU, RDR, RESOURCE, SENSOR R3/PCIE3 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,15} {PCI_EXPRESS_BUS,3} FRU, RDR, RESOURCE, SENSOR R3/PCIE4 {SYSTEM_CHASSIS,0}{SYSTEM_BOARD,0}{SYS_EXPANSION_BOARD,15} {PCI_EXPRESS_BUS,4} FRU, RDR, RESOURCE, SENSOR FM0 {SYSTEM_CHASSIS,0}{COOLING_UNIT,30} CONTROL, FRU, RDR, RESOURCE, SENSOR FM1 {SYSTEM_CHASSIS,0}{COOLING_UNIT,31} CONTROL, FRU, RDR, RESOURCE, SENSOR FM2 {SYSTEM_CHASSIS,0}{COOLING_UNIT,32} CONTROL, FRU, RDR, RESOURCE, SENSOR FM3 {SYSTEM_CHASSIS,0}{COOLING_UNIT,33} CONTROL, FRU, RDR, RESOURCE, SENSOR BMC {SYSTEM_CHASSIS,0}{MC_FIRMWARE,0} EVENT_LOG, FRU, FUMI, INVENTORY, RDR, RESOURCE, WATCHDOG

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