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|Netra Blade X3-2B (formerly Sun Netra X6270 M3 Server Module) HTML Document Collection|
Use these DIMM guidelines and illustrations to help you plan and configure the memory for the Netra Blade X3-2B.
When populating DIMM slots, use the following guidelines.
Each processor has four DDR3 memory channels (or buses).
Each DDR3 memory channel supports up to three DIMMs for a total of 12 DIMMs per processor.
The blade supports one DIMM per channel, two DIMMs per channel, and three DIMMs per channel across all sockets. Minimum per processor is 1 and the maximum per processor is 12.
The minimum supported memory configuration is one DIMM per processor D0.
The maximum supported memory configuration is 384 GB.
Use 8 GB DDR3-1600 LV DIMMs and 16 GB DDR-1600 LV DIMMs only:
Install up to four memory channels, with three DIMMs per channel.
Install up to 24 DIMMs per blade or up to 12 DIMMs per processor.
For optimal performance, install DIMMs in groups of three sockets per channel.
Ensure all slots are filled with either a DIMM or DIMM filler for proper airflow.
Always install DIMMs in ascending order, within a color or group following the “farthest from processor first” convention. See the following table:
Rule 1: Always populate the channels as follows.
Fill up all the blue sockets. Always populate the DIMMs furthest from the processor (blue sockets) first.
Fill up all the white sockets.
Fill up the black sockets.
Tip - The figure illustrates the “fill farthest” approach to DIMM installation.
Rule 2: Memory symmetry across processors is required. Processor 1 memory must match processor 0 memory, in placement, type, size, capacity, frequency and voltage.
Rule 3: Each processor can support a single DIMM, two DIMMs, three DIMMs or four DIMMs per color socket set.
Rule 4: Within every set of four DIMMs (for example: blue socket set, white socket set, black socket set), mixing/matching of different size, memory speed and voltage is not allowed.
Memories in D0, D3, D6 and D9 must be all the same.
Next, memories in D1, D4, D7 and D10 must be all the same, and so on. While doing this, Rule 2 must be maintained.
Rule 5: Mixing and matching of different size, voltage and speed across different 4 DIMM sets is allowed. For example, memories in D0, D3, D6, D9 (blue sockets) must have the same size. But, they do not have to match memory size/voltage/speed in D1, D4, D7, D10 (white sockets).
Note - When mixing speed across different four-DIMM sets, all memory will be tuned to the slower speed.
Note - When mixing sizes across different four-DIMM sets, populate the highest density (largest) DIMMs on the blue socket set, the next size in the white socket set, and the smallest DIMMs in the black socket set.
Rule 6: The blade must have all RDIMMs installed. Mixing of different DIMM technology is not supported.
Rule 7: Each processor can support a maximum of 12 dual-rank (DR) DIMMs.
Rule 8: For maximum performance, DIMMs can run in one of the following three speeds: 1600 MHz, 1333 MHz, and 1067 MHz.
DIMM speed rules are: (SR = single rank; DR = dual rank; QR = quad rank)
One DIMM per channel or 2 DIMMs per channel (DR) = 1600 or 1333 MHz , at full speed as rated by the DIMM.
One DIMM per channel = 1067 MHz.
Three DIMMs per channel (DR) = 1067 MHz
Three DIMMs per channel (QR) is not supported, currently.
Rule 9: The maximum DIMM speed is limited by the processor part number, in conjunction with the DIMM population, whichever is lower. Currently, processor memory speed limitation is a function of core count:
8-core processors from Intel Xeon processor E5-2600 product family will run at a maximum speed of 1600 MHz.
See the following table for the maximum possible memory bus speed (compared to the Intel specification).